Searched refs:_refdiv (Results 1 – 6 of 6) sorted by relevance
| /external/u-boot/drivers/clk/rockchip/ |
| D | clk_rv1108.c | 29 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
30 .refdiv = _refdiv,\
31 .fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
33 _Static_assert(((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ) *\
34 OSC_HZ / (_refdiv * _postdiv1 * _postdiv2) == hz,\
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| D | clk_rk3036.c | 31 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
32 .refdiv = _refdiv,\
33 .fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
35 _Static_assert(((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ) *\
36 OSC_HZ / (_refdiv * _postdiv1 * _postdiv2) == hz,\
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| D | clk_rk322x.c | 28 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
29 .refdiv = _refdiv,\
30 .fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ), \
32 _Static_assert(((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ) * \
33 OSC_HZ / (_refdiv * _postdiv1 * _postdiv2) == hz, \
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| D | clk_rk3128.c | 29 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
30 .refdiv = _refdiv,\
31 .fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
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| D | clk_rk3328.c | 32 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
33 .refdiv = _refdiv,\
34 .fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
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| D | clk_rk3399.c | 44 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
45 .refdiv = _refdiv,\
46 .fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
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