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Searched refs:activate_0_and_1 (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/mach-socfpga/
Dwrap_sdram_config.c190 .activate_0_and_1 = RW_MGR_ACTIVATE_0_AND_1,
/external/u-boot/arch/arm/mach-socfpga/include/mach/
Dsdram_gen5.h124 u8 activate_0_and_1; member
/external/u-boot/drivers/ddr/altera/
Dsequencer.c3160 writel(rwcfg->activate_0_and_1, SDR_PHYGRP_RWMGRGRP_ADDRESS | in mem_precharge_and_activate()