| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.cpp | 189 .addUse(Op0) in buildGEP()
190 .addUse(Op1); in buildGEP()
219 .addUse(Op0) in buildPtrMask()
229 return buildInstr(TargetOpcode::G_BRINDIRECT).addUse(Tgt); in buildBrIndirect()
235 return buildInstr(TargetOpcode::COPY).addDef(Res).addUse(Op); in buildCopy()
280 return buildInstr(TargetOpcode::G_BRCOND).addUse(Tst).addMBB(&Dest); in buildBrCond()
296 .addUse(Addr) in buildLoadInstr()
307 .addUse(Val) in buildStore()
308 .addUse(Addr) in buildStore()
326 .addUse(Op0) in buildUAdde()
[all …]
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| D | IRTranslator.cpp | 282 MIRBuilder.buildInstr(Opcode).addDef(Res).addUse(Op0).addUse(Op1); in translateBinaryOp()
292 .addUse(getOrCreateVReg(*U.getOperand(1))); in translateFSub()
577 MIRBuilder.buildInstr(Opcode).addDef(Res).addUse(Op); in translateCast()
722 .addUse(getOrCreateVReg(*CI.getOperand(0))) in translateOverflowIntrinsic()
723 .addUse(getOrCreateVReg(*CI.getOperand(1))); in translateOverflowIntrinsic()
728 MIB.addUse(Zero); in translateOverflowIntrinsic()
781 .addUse(getOrCreateVReg(*Ptr)) in translateKnownIntrinsic()
824 .addUse(getOrCreateVReg(*CI.getArgOperand(0))) in translateKnownIntrinsic()
825 .addUse(getOrCreateVReg(*CI.getArgOperand(1))); in translateKnownIntrinsic()
830 .addUse(getOrCreateVReg(*CI.getArgOperand(0))); in translateKnownIntrinsic()
[all …]
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| D | LegalizerHelper.cpp | 830 .addUse(MI.getOperand(1).getReg()) in lower()
831 .addUse(MI.getOperand(2).getReg()); in lower()
858 .addUse(LHS) in lower()
859 .addUse(RHS); in lower()
872 .addUse(Res) in lower()
873 .addUse(ShiftAmt); in lower()
910 .addUse(Zero->getOperand(0).getReg()) in lower()
911 .addUse(MI.getOperand(1).getReg()); in lower()
925 MIRBuilder.buildInstr(TargetOpcode::G_FNEG).addDef(Neg).addUse(RHS); in lower()
928 .addUse(LHS) in lower()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstructionSelector.cpp | 331 .addUse(SrcReg); in selectFP16CopyFromGPR32()
335 .addUse(CopyReg, 0, AArch64::hsub); in selectFP16CopyFromGPR32()
406 .addUse(SrcReg) in selectCopy()
623 .addUse(LHS) in selectCompareBranch()
653 .addUse(ArgsAddrReg) in selectVaStartDarwin()
654 .addUse(ListReg) in selectVaStartDarwin()
682 auto MovI = MIB.buildInstr(AArch64::MOVKXi).addDef(DstReg).addUse(SrcReg); in materializeLargeCMVal()
786 .addUse(CondReg) in select()
867 .addUse(DefGPRReg); in select()
913 .addUse(DstReg, 0, AArch64::sub_32); in select()
[all …]
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| D | AArch64ExpandPseudoInsts.cpp | 710 .addUse(AArch64::WZR) in expandCMP_SWAP_128()
711 .addUse(AArch64::WZR) in expandCMP_SWAP_128()
718 .addUse(StatusReg, RegState::Kill) in expandCMP_SWAP_128()
719 .addUse(StatusReg, RegState::Kill) in expandCMP_SWAP_128()
722 .addUse(StatusReg, getKillRegState(StatusDead)) in expandCMP_SWAP_128()
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| D | AArch64CallLowering.cpp | 151 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | ConstantFoldingMIRBuilder.h | 88 return buildInstr(Opcode).addDef(Dst).addUse(Src0).addUse(Src1); in buildBinaryOp()
122 return buildInstr(Opc).addDef(Dst).addUse(Src0).addUse(Src1); in buildInstr()
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| D | MachineIRBuilder.h | 80 MIB.addUse(Reg); in addUseFromArg()
84 MIB.addUse(UseMIB->getOperand(0).getReg()); in addUseFromArg()
1074 return buildInstr(Opcode).addDef(Dst).addUse(Src0).addUse(Src1); in buildBinaryOp()
|
| /external/llvm/lib/IR/ |
| D | Use.cpp | 28 Val->addUse(*this); in swap()
35 RHS.Val->addUse(RHS); in swap()
|
| /external/swiftshader/third_party/LLVM/lib/VMCore/ |
| D | Use.cpp | 33 V2->addUse(*this); in swap()
40 V1->addUse(RHS); in swap()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/IR/ |
| D | Use.cpp | 28 Val->addUse(*this); in swap()
35 RHS.Val->addUse(RHS); in swap()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstructionSelector.cpp | 471 .addUse(LHSReg) in insertComparison()
472 .addUse(RHSReg) in insertComparison()
489 .addUse(PrevRes) in insertComparison()
630 .addUse(CondReg) in selectSelect()
646 .addUse(TrueReg) in selectSelect()
647 .addUse(FalseReg) in selectSelect()
719 .addUse(AndResult) in select()
769 .addUse(SrcReg) in select()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsInstructionSelector.cpp | 158 .addUse(LUiReg) in select()
184 .addUse(LUiReg) in select()
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| D | MipsCallLowering.cpp | 149 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
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| /external/swiftshader/third_party/LLVM/include/llvm/ |
| D | Value.h | 192 void addUse(Use &U) { U.addToList(&UseList); } in addUse() function
325 if (V) V->addUse(*this); in set()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86CallLowering.cpp | 128 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
429 MIB.addUse(X86::AL, RegState::Implicit); in lowerCall()
|
| /external/swiftshader/third_party/llvm-subzero/include/llvm/IR/ |
| D | Value.h | 406 void addUse(Use &U) { U.addToList(&UseList); } in addUse() function
626 if (V) V->addUse(*this); in set()
|
| /external/llvm/include/llvm/IR/ |
| D | Value.h | 397 void addUse(Use &U) { U.addToList(&UseList); } in addUse() function
616 if (V) V->addUse(*this); in set()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/ |
| D | Value.h | 436 void addUse(Use &U) { U.addToList(&UseList); } in addUse() function
673 if (V) V->addUse(*this); in set()
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | SelectionDAGNodes.h | 669 void addUse(SDUse &U) { U.addToList(&UseList); }
811 if (V.getNode()) V.getNode()->addUse(*this);
816 V.getNode()->addUse(*this);
822 if (N) N->addUse(*this);
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| /external/llvm/include/llvm/CodeGen/ |
| D | SelectionDAGNodes.h | 805 void addUse(SDUse &U) { U.addToList(&UseList); }
918 if (V.getNode()) V.getNode()->addUse(*this);
923 V.getNode()->addUse(*this);
929 if (N) N->addUse(*this);
|
| /external/skia/tests/ |
| D | GpuLayerCacheTest.cpp | 103 cache->addUse(layer);
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIFormMemoryClauses.cpp | 374 B.addUse(R.first, R.second.first & ~RegState::Kill, SubReg); in runOnMachineFunction()
|
| /external/skqp/tests/ |
| D | GpuLayerCacheTest.cpp | 103 cache->addUse(layer);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | SelectionDAGNodes.h | 1040 void addUse(SDUse &U) { U.addToList(&UseList); }
1178 if (V.getNode()) V.getNode()->addUse(*this);
1183 V.getNode()->addUse(*this);
1189 if (N) N->addUse(*this);
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