| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/ |
| D | vec-add-01.ll | 1 ; Test vector addition.
5 ; Test a v16i8 addition.
14 ; Test a v8i16 addition.
23 ; Test a v4i32 addition.
32 ; Test a v2i64 addition.
41 ; Test a v2f64 addition.
51 ; Test an f64 addition that uses vector registers.
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| D | int-add-09.ll | 1 ; Test 128-bit addition in which the second operand is constant.
6 ; constant into a register and use memory addition.
32 ; Check the next value up, which must use register addition.
45 ; Check addition of -1, which must also use register addition.
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| D | vec-add-02.ll | 1 ; Test vector addition on z14.
5 ; Test a v4f32 addition.
15 ; Test an f32 addition that uses vector registers.
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| D | atomicrmw-add-04.ll | 5 ; Check addition of a variable.
19 ; Check addition of 1, which can use AGHI.
60 ; Check the next value up, which must use a register addition.
69 ; Check addition of -1, which can use AGHI.
105 ; Check the next value down, which must use a register addition.
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| D | fp-add-03.ll | 1 ; Test 128-bit floating-point addition.
5 ; There is no memory form of 128-bit addition.
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| D | atomicrmw-add-02.ll | 7 ; Check addition of a variable.
77 ; Check addition of -1. We add 0xffff0000 to the rotated word.
91 ; Check addition of 1. We add 0x00010000 to the rotated word.
119 ; Check addition of a large unsigned value. We add 0xfffe0000 to the
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| D | atomicrmw-add-01.ll | 7 ; Check addition of a variable.
77 ; Check addition of -1. We add 0xff000000 to the rotated word.
91 ; Check addition of 1. We add 0x01000000 to the rotated word.
119 ; Check addition of a large unsigned value. We add 0xfe000000 to the
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| D | atomicrmw-add-03.ll | 5 ; Check addition of a variable.
19 ; Check addition of 1, which can use AHI.
69 ; Check addition of -1, which can use AHI.
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| D | atomicrmw-add-05.ll | 5 ; Check addition of a variable.
14 ; Check addition of 1, which needs a temporary.
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| /external/llvm/test/CodeGen/SystemZ/ |
| D | vec-add-01.ll | 1 ; Test vector addition.
5 ; Test a v16i8 addition.
14 ; Test a v8i16 addition.
23 ; Test a v4i32 addition.
32 ; Test a v2i64 addition.
41 ; Test a v2f64 addition.
51 ; Test an f64 addition that uses vector registers.
|
| D | int-add-09.ll | 1 ; Test 128-bit addition in which the second operand is constant.
6 ; constant into a register and use memory addition.
32 ; Check the next value up, which must use register addition.
45 ; Check addition of -1, which must also use register addition.
|
| D | atomicrmw-add-04.ll | 5 ; Check addition of a variable.
19 ; Check addition of 1, which can use AGHI.
60 ; Check the next value up, which must use a register addition.
69 ; Check addition of -1, which can use AGHI.
105 ; Check the next value down, which must use a register addition.
|
| D | fp-add-03.ll | 1 ; Test 128-bit floating-point addition.
5 ; There is no memory form of 128-bit addition.
|
| D | atomicrmw-add-01.ll | 7 ; Check addition of a variable.
77 ; Check addition of -1. We add 0xff000000 to the rotated word.
91 ; Check addition of 1. We add 0x01000000 to the rotated word.
119 ; Check addition of a large unsigned value. We add 0xfe000000 to the
|
| D | atomicrmw-add-02.ll | 7 ; Check addition of a variable.
77 ; Check addition of -1. We add 0xffff0000 to the rotated word.
91 ; Check addition of 1. We add 0x00010000 to the rotated word.
119 ; Check addition of a large unsigned value. We add 0xfffe0000 to the
|
| D | atomicrmw-add-03.ll | 5 ; Check addition of a variable.
19 ; Check addition of 1, which can use AHI.
69 ; Check addition of -1, which can use AHI.
|
| /external/libxml2/result/schemas/ |
| D | src-element2-2_0_0.err | 4 …ute 'type': Only the attributes 'minOccurs', 'maxOccurs' and 'id' are allowed in addition to 'ref'.
5 …'nillable': Only the attributes 'minOccurs', 'maxOccurs' and 'id' are allowed in addition to 'ref'.
6 … 'default': Only the attributes 'minOccurs', 'maxOccurs' and 'id' are allowed in addition to 'ref'.
7 …te 'fixed': Only the attributes 'minOccurs', 'maxOccurs' and 'id' are allowed in addition to 'ref'.
8 …ute 'form': Only the attributes 'minOccurs', 'maxOccurs' and 'id' are allowed in addition to 'ref'.
9 …te 'block': Only the attributes 'minOccurs', 'maxOccurs' and 'id' are allowed in addition to 'ref'.
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| /external/antlr/tool/src/main/java/org/antlr/misc/ |
| D | IntervalSet.java | 101 protected void add(Interval addition) { in add() argument
103 if ( addition.b<addition.a ) { in add()
110 if ( addition.equals(r) ) { in add()
113 if ( addition.adjacent(r) || !addition.disjoint(r) ) { in add()
115 Interval bigger = addition.union(r); in add()
133 if ( addition.startsBeforeDisjoint(r) ) { in add()
136 iter.add(addition); in add()
143 intervals.add(addition); in add()
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| /external/stressapptest/src/ |
| D | pattern.h | 117 uint32 addition = (expected ^ index); in CrcIncrement() local
118 uint32 carry = (addition & crc) >> 31; in CrcIncrement()
120 return crc + addition + carry; in CrcIncrement()
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| /external/compiler-rt/lib/builtins/ |
| D | fp_add_impl.inc | 1 //===----- lib/fp_add_impl.inc - floaing point addition -----------*- C -*-===//
10 // This file implements soft-float addition with the IEEE-754 default rounding
70 // have opposite signs, we are performing a subtraction; otherwise addition.
105 else /* addition */ {
108 // If the addition carried up, we need to right-shift the result and
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| /external/gemmlowp/doc/ |
| D | output.md | 17 inference, one might have a Convolutional layer with a bias-addition and an
19 implementing the Convolutional operator itself, directly into the bias-addition
21 the bias-addition and activation function are just additional stages in the
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| /external/deqp/external/vulkancts/modules/vulkan/tessellation/ |
| D | vktTessellationGeometryPointSizeTests.cpp | 80 int addition = 0; in getExpectedPointSize() local
86 addition += 2; in getExpectedPointSize()
90 return 4 + addition; in getExpectedPointSize()
92 addition += 2; in getExpectedPointSize()
96 return 2 + addition; in getExpectedPointSize()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/ |
| D | GenericOpcodes.td | 145 // Generic addition.
284 // Generic unsigned addition consuming and producing a carry flag.
291 // Generic signed addition producing a carry flag.
403 // Generic FP addition.
489 // Generic load. Expects a MachineMemOperand in addition to explicit operands.
497 // Generic sign-extended load. Expects a MachineMemOperand in addition to explicit operands.
505 // Generic zero-extended load. Expects a MachineMemOperand in addition to explicit operands.
513 // Generic store. Expects a MachineMemOperand in addition to explicit operands.
522 // MachineMemOperand in addition to explicit operands.
531 // Generic atomic cmpxchg. Expects a MachineMemOperand in addition to explicit
[all …]
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| /external/libxkbcommon/xkbcommon/test/data/symbols/ |
| D | nbsp | 65 // level3n provides narrow no-breaking space in addition to the normal one
74 // level4n provides narrow no-breaking space in addition to the normal one
83 // level4nl provides narrow no-breaking space in addition to the normal one
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| /external/tensorflow/tensorflow/core/api_def/base_api/ |
| D | api_def_ResourceScatterNdAdd.pbtxt | 31 summary: "Applies sparse addition to individual values or slices in a Variable."
49 8 elements. In Python, that addition would look like this:
|