Searched refs:ahb_reset0_cfg (Results 1 – 16 of 16) sorted by relevance
| /external/u-boot/arch/arm/mach-sunxi/ |
| D | cpu_info.c | 26 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_SS); in sunxi_get_ss_bonding_id()
34 clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_SS); in sunxi_get_ss_bonding_id()
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| D | dram_sun8i_a83t.c | 398 clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
410 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
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| D | dram_sun9i.c | 273 clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
280 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
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| D | dram_sunxi_dw.c | 374 clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
402 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
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| D | clock_sun6i.c | 56 setbits_le32(&ccm->ahb_reset0_cfg, 0x1 << AHB_GATE_OFFSET_SATA); in clock_init_safe()
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| D | dram_sun8i_a23.c | 68 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
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| D | dram_sun8i_a33.c | 314 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
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| D | dram_sun6i.c | 45 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
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| /external/u-boot/drivers/usb/musb-new/ |
| D | sunxi.c | 307 setbits_le32(&glue->ccm->ahb_reset0_cfg, BIT(AHB_GATE_OFFSET_USB0)); in sunxi_musb_init()
309 setbits_le32(&glue->ccm->ahb_reset0_cfg, in sunxi_musb_init()
472 clrbits_le32(&glue->ccm->ahb_reset0_cfg, BIT(AHB_GATE_OFFSET_USB0)); in musb_usb_remove()
474 clrbits_le32(&glue->ccm->ahb_reset0_cfg, in musb_usb_remove()
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| /external/u-boot/board/sunxi/ |
| D | gmac.c | 17 setbits_le32(&ccm->ahb_reset0_cfg, 0x1 << AHB_RESET_OFFSET_GMAC);
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| D | board.c | 292 setbits_le32(&ccm->ahb_reset0_cfg, (1 << AHB_GATE_OFFSET_NAND0)); in nand_clock_setup()
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| /external/u-boot/arch/arm/include/asm/arch-sunxi/ |
| D | clock_sun9i.h | 90 u32 ahb_reset0_cfg; /* 0x5a0 AHB0 Software Reset Register */ member
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| D | clock_sun8i_a83t.h | 120 u32 ahb_reset0_cfg; /* 0x2c0 AHB1 Reset 0 config */ member
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| D | clock_sun6i.h | 150 u32 ahb_reset0_cfg; /* 0x2c0 AHB1 Reset 0 config */ member
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| /external/u-boot/drivers/mmc/ |
| D | sunxi_mmc.c | 516 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MMC(sdc_no)); in sunxi_mmc_init()
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| /external/u-boot/drivers/net/ |
| D | sun8i_emac.c | 636 setbits_le32(&ccm->ahb_reset0_cfg, BIT(AHB_RESET_OFFSET_GMAC)); in sun8i_emac_board_setup()
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