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Searched refs:apll_pdiv (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-exynos/
Dclock_init_exynos5.c29 .apll_pdiv = 0x2,
46 .apll_pdiv = 0x4,
61 .apll_pdiv = 0x3,
76 .apll_pdiv = 0x3,
91 .apll_pdiv = 0x3,
106 .apll_pdiv = 0x3,
121 .apll_pdiv = 0x6,
584 writel(mem->apll_pdiv * PLL_LOCK_FACTOR, &clk->apll_lock); in exynos5250_system_clock_init()
619 val = set_pll(arm_clk_ratio->apll_mdiv, arm_clk_ratio->apll_pdiv, in exynos5250_system_clock_init()
794 writel(arm_clk_ratio->apll_pdiv * PLL_LOCK_FACTOR, &clk->apll_lock); in exynos5420_system_clock_init()
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Dclock_init.h24 unsigned apll_pdiv; member
45 unsigned apll_pdiv; member