Searched refs:bit_off (Results 1 – 5 of 5) sorted by relevance
/external/u-boot/arch/arm/mach-mvebu/serdes/a38x/ |
D | high_speed_env_spec.c | 1460 u8 bit_off = (is_rx) ? 11 : 10; in serdes_polarity_config() local 1464 data = SET_BIT(data, bit_off); in serdes_polarity_config()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrFormats.td | 1194 : I<(outs), (ins regtype:$Rt, immtype:$bit_off, am_tbrcond:$target), 1195 asm, "\t$Rt, $bit_off, $target", "", 1196 [(node regtype:$Rt, immtype:$bit_off, bb:$target)]>, 1202 bits<6> bit_off; 1207 let Inst{23-19} = bit_off{4-0};
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64InstrFormats.td | 1490 : I<(outs), (ins regtype:$Rt, immtype:$bit_off, am_tbrcond:$target), 1491 asm, "\t$Rt, $bit_off, $target", "", 1492 [(node regtype:$Rt, immtype:$bit_off, bb:$target)]>, 1498 bits<6> bit_off; 1503 let Inst{23-19} = bit_off{4-0};
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenDAGISel.inc | 29576 /* 56654*/ OPC_RecordChild2, // #2 = $bit_off 29590 …PR32:{ *:[i32] }:$Rt, (imm:{ *:[i64] })<<P:Predicate_tbz_imm0_31_diag>>:$bit_off, (bb:{ *:[Other] … 29591 … // Dst: (TBZW GPR32:{ *:[i32] }:$Rt, (imm:{ *:[i64] }):$bit_off, (bb:{ *:[Other] }):$target) 29594 /* 56684*/ OPC_RecordChild2, // #2 = $bit_off 29609 …bz GPR64:{ *:[i64] }:$Rt, (imm:{ *:[i64] })<<P:Predicate_tbz_imm32_63>>:$bit_off, (bb:{ *:[Other] … 29610 … // Dst: (TBZX GPR64:{ *:[i64] }:$Rt, (imm:{ *:[i64] }):$bit_off, (bb:{ *:[Other] }):$target) 29634 /* 56756*/ OPC_RecordChild2, // #2 = $bit_off 29648 …PR32:{ *:[i32] }:$Rt, (imm:{ *:[i64] })<<P:Predicate_tbz_imm0_31_diag>>:$bit_off, (bb:{ *:[Other] … 29649 … // Dst: (TBNZW GPR32:{ *:[i32] }:$Rt, (imm:{ *:[i64] }):$bit_off, (bb:{ *:[Other] }):$target) 29652 /* 56786*/ OPC_RecordChild2, // #2 = $bit_off [all …]
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D | AArch64GenMCCodeEmitter.inc | 9933 // op: bit_off
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