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Searched refs:bnez (Results 1 – 25 of 135) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/RISCV/
Drv64-relaxation.s20 c.bnez a0, NEAR
21 #INSTR: c.bnez a0, 56
22 #RELAX-INSTR: c.bnez a0, 0
24 c.bnez a0, NEAR_NEGATIVE
25 #INSTR: c.bnez a0, -4
26 #RELAX-INSTR: c.bnez a0, 0
28 c.bnez a0, FAR_BRANCH
32 c.bnez a0, FAR_BRANCH_NEGATIVE
36 c.bnez a0, FAR_JUMP
40 c.bnez a0, FAR_JUMP_NEGATIVE
Drv32-relaxation.s20 c.bnez a0, NEAR
21 #INSTR: c.bnez a0, 72
22 #RELAX-INSTR: c.bnez a0, 0
24 c.bnez a0, NEAR_NEGATIVE
25 #INSTR: c.bnez a0, -4
26 #RELAX-INSTR: c.bnez a0, 0
28 c.bnez a0, FAR_BRANCH
32 c.bnez a0, FAR_BRANCH_NEGATIVE
36 c.bnez a0, FAR_JUMP
40 c.bnez a0, FAR_JUMP_NEGATIVE
Dcompressed-relocations.s18 c.bnez a0, foo
19 # A compressed branch (c.bnez) to an unresolved symbol will be relaxed to a (bnez).
21 # INSTR: c.bnez a0, foo
/external/u-boot/arch/mips/mach-ath79/ar933x/
Dlowlevel_init.S92 bnez t3, 1b
102 bnez t1, 2b
137 bnez t1, 1f
164 bnez t1, 1f
178 bnez t1, 1f
192 bnez t1, 1b
202 bnez t1, 1f
218 bnez t1, 1b
243 bnez t2, 1b
267 bnez t3, 3b
/external/llvm/test/MC/Mips/
Dmacro-divu.s7 # CHECK-NOTRAP: bnez $11, 8 # encoding: [0x15,0x60,0x00,0x02]
13 # CHECK-NOTRAP: bnez $12, 8 # encoding: [0x15,0x80,0x00,0x02]
19 # CHECK-NOTRAP: bnez $zero, 8 # encoding: [0x14,0x00,0x00,0x02]
31 # CHECK-NOTRAP: bnez $6, 8 # encoding: [0x14,0xc0,0x00,0x02]
37 # CHECK-NOTRAP: bnez $zero, 8 # encoding: [0x14,0x00,0x00,0x02]
43 # CHECK-NOTRAP: bnez $zero, 8 # encoding: [0x14,0x00,0x00,0x02]
Dbranch-pseudos.s9 # CHECK: bnez $1, local_label # encoding: [0x14,0x20,A,A]
14 # CHECK: bnez $1, global_label # encoding: [0x14,0x20,A,A]
32 # CHECK: bnez $1, local_label # encoding: [0x14,0x20,A,A]
37 # CHECK: bnez $1, global_label # encoding: [0x14,0x20,A,A]
43 # CHECK: bnez $8, local_label # encoding: [0x15,0x00,A,A]
149 # CHECK: bnez $1, local_label # encoding: [0x14,0x20,A,A]
154 # CHECK: bnez $1, global_label # encoding: [0x14,0x20,A,A]
172 # CHECK: bnez $1, local_label # encoding: [0x14,0x20,A,A]
177 # CHECK: bnez $1, global_label # encoding: [0x14,0x20,A,A]
181 # CHECK: bnez $7, local_label # encoding: [0x14,0xe0,A,A]
[all …]
Dmacro-bcc-imm.s8 # ALL: bnez $1, foo
20 # ALL: bnez $1, foo
24 # ALL: bnez $1, foo
36 # ALL: bnez $1, foo
Ddouble-expand.s7 bnez $2, foo
10 # CHECK: bnez $2, foo
Dmacro-div.s7 # CHECK-NOTRAP: bnez $11, 8 # encoding: [0x15,0x60,0x00,0x02]
19 # CHECK-NOTRAP: bnez $12, 8 # encoding: [0x15,0x80,0x00,0x02]
40 # CHECK-NOTRAP: bnez $6, 8 # encoding: [0x14,0xc0,0x00,0x02]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/RISCV/
Dfloat-select-fcmp.ll21 ; RV32IF-NEXT: bnez a0, .LBB1_2
38 ; RV32IF-NEXT: bnez a0, .LBB2_2
55 ; RV32IF-NEXT: bnez a0, .LBB3_2
72 ; RV32IF-NEXT: bnez a0, .LBB4_2
89 ; RV32IF-NEXT: bnez a0, .LBB5_2
114 ; RV32IF-NEXT: bnez a0, .LBB6_2
135 ; RV32IF-NEXT: bnez a0, .LBB7_2
157 ; RV32IF-NEXT: bnez a0, .LBB8_2
175 ; RV32IF-NEXT: bnez a0, .LBB9_2
193 ; RV32IF-NEXT: bnez a0, .LBB10_2
[all …]
Ddouble-select-fcmp.ll27 ; RV32IFD-NEXT: bnez a0, .LBB1_2
52 ; RV32IFD-NEXT: bnez a0, .LBB2_2
77 ; RV32IFD-NEXT: bnez a0, .LBB3_2
102 ; RV32IFD-NEXT: bnez a0, .LBB4_2
127 ; RV32IFD-NEXT: bnez a0, .LBB5_2
160 ; RV32IFD-NEXT: bnez a0, .LBB6_2
189 ; RV32IFD-NEXT: bnez a0, .LBB7_2
219 ; RV32IFD-NEXT: bnez a0, .LBB8_2
245 ; RV32IFD-NEXT: bnez a0, .LBB9_2
271 ; RV32IFD-NEXT: bnez a0, .LBB10_2
[all …]
Dfloat-br-fcmp.ll15 ; RV32IF-NEXT: bnez a0, .LBB0_2
39 ; RV32IF-NEXT: bnez a0, .LBB1_2
91 ; RV32IF-NEXT: bnez a0, .LBB3_2
115 ; RV32IF-NEXT: bnez a0, .LBB4_2
139 ; RV32IF-NEXT: bnez a0, .LBB5_2
163 ; RV32IF-NEXT: bnez a0, .LBB6_2
195 ; RV32IF-NEXT: bnez a0, .LBB7_2
223 ; RV32IF-NEXT: bnez a0, .LBB8_2
252 ; RV32IF-NEXT: bnez a0, .LBB9_2
277 ; RV32IF-NEXT: bnez a0, .LBB10_2
[all …]
Ddouble-br-fcmp.ll14 ; RV32IFD-NEXT: bnez a0, .LBB0_2
42 ; RV32IFD-NEXT: bnez a0, .LBB1_2
102 ; RV32IFD-NEXT: bnez a0, .LBB3_2
130 ; RV32IFD-NEXT: bnez a0, .LBB4_2
158 ; RV32IFD-NEXT: bnez a0, .LBB5_2
186 ; RV32IFD-NEXT: bnez a0, .LBB6_2
222 ; RV32IFD-NEXT: bnez a0, .LBB7_2
254 ; RV32IFD-NEXT: bnez a0, .LBB8_2
287 ; RV32IFD-NEXT: bnez a0, .LBB9_2
316 ; RV32IFD-NEXT: bnez a0, .LBB10_2
[all …]
Dbare-select.ll9 ; RV32I-NEXT: bnez a0, .LBB0_2
23 ; RV32I-NEXT: bnez a0, .LBB1_2
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/llvm-ir/
Dselect-int.ll38 ; M2: bnez $[[T0]], [[BB0:\$BB[0-9_]+]]
39 ; M3: bnez $[[T0]], [[BB0:\.LBB[0-9_]+]]
74 ; M2: bnez $[[T0]], [[BB0:\$BB[0-9_]+]]
75 ; M3: bnez $[[T0]], [[BB0:\.LBB[0-9_]+]]
110 ; M2: bnez $[[T0]], [[BB0:\$BB[0-9_]+]]
111 ; M3: bnez $[[T0]], [[BB0:\.LBB[0-9_]+]]
147 ; M2: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
152 ; M2: bnez $[[T0]], $[[BB1:BB[0-9_]+]]
177 ; M3: bnez $[[T0]], [[BB0:\.LBB[0-9_]+]]
221 ; M2: bnez $[[T2]], [[BB0:\$BB[0-9_]+]]
[all …]
/external/llvm/test/CodeGen/Mips/
Dlcb2.ll10 define i32 @bnez() #0 {
24 ; lcb: .ent bnez
25 ; lcbn: .ent bnez
26 ; lcb: bnez ${{[0-9]+}}, $BB{{[0-9]+}}_{{[0-9]+}}
27 ; lcbn-NOT: bnez ${{[0-9]+}}, $BB{{[0-9]+}}_{{[0-9]+}} # 16 bit inst
28 ; lcb: .end bnez
29 ; lcbn: .end bnez
Dfpbr.ll19 ; FIXME: We ought to be able to transform not+bnez -> beqz
21 ; 32-GPR: bnez $[[GPRCC]], $BB0_2
55 ; 32-GPR: bnez $[[GPRCC]], $BB1_2
114 ; FIXME: We ought to be able to transform not+bnez -> beqz
116 ; 32-GPR: bnez $[[GPRCC]], $BB3_2
146 ; 32-GPR: bnez $[[GPRCC]], $BB4_2
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Dlcb2.ll10 define i32 @bnez() #0 {
24 ; lcb: .ent bnez
25 ; lcbn: .ent bnez
26 ; lcb: bnez ${{[0-9]+}}, $BB{{[0-9]+}}_{{[0-9]+}}
27 ; lcbn-NOT: bnez ${{[0-9]+}}, $BB{{[0-9]+}}_{{[0-9]+}} # 16 bit inst
28 ; lcb: .end bnez
29 ; lcbn: .end bnez
Dfpbr.ll20 ; FIXME: We ought to be able to transform not+bnez -> beqz
22 ; 32-GPR: bnez $[[GPRCC]], $BB0_2
57 ; 32-GPR: bnez $[[GPRCC]], $BB1_2
118 ; FIXME: We ought to be able to transform not+bnez -> beqz
120 ; 32-GPR: bnez $[[GPRCC]], $BB3_2
151 ; 32-GPR: bnez $[[GPRCC]], $BB4_2
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Dbranch-pseudos.s9 # CHECK: bnez $1, local_label # encoding: [0x14,0x20,A,A]
14 # CHECK: bnez $1, global_label # encoding: [0x14,0x20,A,A]
32 # CHECK: bnez $1, local_label # encoding: [0x14,0x20,A,A]
37 # CHECK: bnez $1, global_label # encoding: [0x14,0x20,A,A]
43 # CHECK: bnez $8, local_label # encoding: [0x15,0x00,A,A]
149 # CHECK: bnez $1, local_label # encoding: [0x14,0x20,A,A]
154 # CHECK: bnez $1, global_label # encoding: [0x14,0x20,A,A]
172 # CHECK: bnez $1, local_label # encoding: [0x14,0x20,A,A]
177 # CHECK: bnez $1, global_label # encoding: [0x14,0x20,A,A]
181 # CHECK: bnez $7, local_label # encoding: [0x14,0xe0,A,A]
[all …]
Dmicromips-el-fixup-data.s17 bnez $9, lab1
19 # CHECK: 09 b4 04 00 bnez $9, 12
Ddouble-expand.s7 bnez $2, foo
10 # CHECK: bnez $2, foo
Dmacro-divu.s7 # CHECK-NOTRAP: bnez $11, $tmp0 # encoding: [0x15,0x60,A,A]
15 # CHECK-NOTRAP: bnez $12, $tmp1 # encoding: [0x15,0x80,A,A]
32 # CHECK-NOTRAP: bnez $6, $tmp2 # encoding: [0x14,0xc0,A,A]
Dmacro-bcc-imm.s46 # ALL: bnez $1, foo
58 # ALL: bnez $1, foo
62 # ALL: bnez $1, foo
74 # ALL: bnez $1, foo
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dselect-int.ll38 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
73 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
108 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
143 ; M2: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
148 ; M2: bnez $[[T0]], $[[BB1:BB[0-9_]+]]
173 ; M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
217 ; M2: bnez $[[T2]], $[[BB0:BB[0-9_]+]]
226 ; M3: bnez $[[T2]], $[[BB0:BB[0-9_]+]]

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