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Searched refs:ck_delay (Results 1 – 8 of 8) sorted by relevance

/external/u-boot/drivers/ddr/marvell/a38x/
Dddr_topology_def.h97 u32 ck_delay; member
Dddr3_init.c196 params.ck_delay = TUNE_TRAINING_PARAMS_CK_DELAY; in mv_ddr_training_params_set()
Dddr3_training_hw_algo.c644 if (ck_delay == PARAM_UNDEFINED) in ddr3_tip_cmd_addr_init_delay()
653 ck_num_adll_tap = ck_delay / adll_tap; in ddr3_tip_cmd_addr_init_delay()
Dddr3_training_ip_prv_if.h20 u32 ck_delay; member
Dddr3_init.h88 extern u32 delay_enable, ck_delay, ca_delay;
Dmv_ddr_plat.c564 info_ptr->ck_delay = ck_delay; in ddr3_tip_a38x_get_device_info()
Dddr3_training.c61 u32 ck_delay = PARAM_UNDEFINED; variable
216 if (params->ck_delay != PARAM_UNDEFINED) in ddr3_tip_tune_training_params()
217 ck_delay = params->ck_delay; in ddr3_tip_tune_training_params()
864 status &= ddr3_tip_validate_algo_var(ck_delay, PARAM_UNDEFINED, "ck_delay"); in ddr3_tip_validate_algo_components()
Dddr3_debug.c321 printf("\tDDR3 CK delay: %d\n", info_ptr.ck_delay); in print_device_info()
1111 *ptr = (u32 *)&ck_delay; in ddr3_tip_access_atr()