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Searched refs:clksrc (Results 1 – 7 of 7) sorted by relevance

/external/u-boot/drivers/clk/
Dclk_stm32mp1.c1375 static int set_clksrc(struct stm32mp1_clk_priv *priv, unsigned int clksrc) in set_clksrc() argument
1377 u32 address = priv->base + (clksrc >> 4); in set_clksrc()
1381 clrsetbits_le32(address, RCC_SELR_SRC_MASK, clksrc & RCC_SELR_SRC_MASK); in set_clksrc()
1386 clksrc, address, readl(address)); in set_clksrc()
1437 u32 clksrc, u32 clkdiv) in stm32mp1_mco_csg() argument
1439 u32 address = priv->base + (clksrc >> 4); in stm32mp1_mco_csg()
1446 if (clksrc & 0x8) { in stm32mp1_mco_csg()
1451 clksrc & RCC_MCOCFG_MCOSRC_MASK); in stm32mp1_mco_csg()
1460 unsigned int clksrc, in set_rtcsrc() argument
1468 if (clksrc == CLK_RTC_DISABLED) in set_rtcsrc()
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/external/u-boot/doc/device-tree-bindings/clock/
Dst,stm32mp1.txt22 - st,clksrc : The clock source in this order
28 dt-bindings/clock/stm32mp1-clksrc.h: CLK_<NAME>_<SOURCE>
85 you can use associated defines from stm32mp1-clksrc.h
92 in the file dt-bindings/clock/stm32mp1-clksrc.h
105 st,clksrc = < CLK_MPU_PLL1P
177 (see LSEDRV_ define in the file dt-bindings/clock/stm32mp1-clksrc.h)
/external/u-boot/arch/arm/mach-davinci/
Ddm365_lowlevel.c27 unsigned int clksrc = 0x0; in dm365_pll1_init() local
34 clksrc << PLLCTL_CLOCK_MODE_SHIFT); in dm365_pll1_init()
104 unsigned int clksrc = 0x0; in dm365_pll2_init() local
116 clksrc << PLLCTL_CLOCK_MODE_SHIFT); in dm365_pll2_init()
/external/u-boot/arch/arm/dts/
Dstm32mp157c-ed1-u-boot.dtsi6 #include <dt-bindings/clock/stm32mp1-clksrc.h>
49 st,clksrc = <
/external/u-boot/arch/arm/mach-imx/mx7ulp/
Dpcc.c118 clksrc_type = pcc_arrays[clk].clksrc; in pcc_clock_sel()
219 clksrc_type = pcc_arrays[clk].clksrc; in pcc_clock_get_clksrc()
Dscg.c16 static u32 scg_src_get_rate(enum scg_clk clksrc) in scg_src_get_rate() argument
20 switch (clksrc) { in scg_src_get_rate()
/external/u-boot/arch/arm/include/asm/arch-mx7ulp/
Dpcc.h362 enum pcc_clksrc_type clksrc; member