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Searched refs:cmpb (Results 1 – 25 of 144) sorted by relevance

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/external/llvm/test/CodeGen/X86/
Dpr5145.ll8 ; CHECK: cmpb
14 ; CHECK: cmpb
20 ; CHECK: cmpb
26 ; CHECK: cmpb
Dshrink-compare.ll19 ; CHECK: cmpb $47, (%{{rdi|rcx}})
35 ; CHECK: cmpb $47, %{{dil|cl}}
51 ; CHECK: cmpb $-1, %{{dil|cl}}
112 ; CHECK: cmpb $1, %{{dil|cl}}
128 ; CHECK: cmpb $47, %{{dil|cl}}
144 ; CHECK: cmpb $127, %{{dil|cl}}
160 ; CHECK: cmpb $-1, %{{dil|cl}}
176 ; CHECK: cmpb $-2, %{{dil|cl}}
192 ; CHECK: cmpb $-127, %{{dil|cl}}
208 ; CHECK: cmpb $-128, %{{dil|cl}}
Dlicm-dominance.ll9 ; CHECK: cmpb $1, ({{%[a-z0-9]+}})
10 ; CHECK: cmpb $2, ({{%[a-z0-9]+}})
11 ; CHECK: cmpb $3, ({{%[a-z0-9]+}})
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dpr5145.ll8 ; CHECK: cmpb
14 ; CHECK: cmpb
20 ; CHECK: cmpb
26 ; CHECK: cmpb
Dshrink-compare.ll9 ; CHECK-NEXT: cmpb $47, (%rdi)
30 ; CHECK-NEXT: cmpb $47, %dil
50 ; CHECK-NEXT: cmpb $-1, %dil
148 ; CHECK-NEXT: cmpb $1, %dil
168 ; CHECK-NEXT: cmpb $47, %dil
188 ; CHECK-NEXT: cmpb $127, %dil
208 ; CHECK-NEXT: cmpb $-1, %dil
228 ; CHECK-NEXT: cmpb $-2, %dil
248 ; CHECK-NEXT: cmpb $-127, %dil
268 ; CHECK-NEXT: cmpb $-128, %dil
Dlicm-dominance.ll9 ; CHECK: cmpb $1, ({{%[a-z0-9]+}})
10 ; CHECK: cmpb $2, ({{%[a-z0-9]+}})
11 ; CHECK: cmpb $3, ({{%[a-z0-9]+}})
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dcmpb.ll19 ; CHECK: cmpb [[REG1:[0-9]+]], 4, 3
37 ; CHECK: cmpb [[REG1:[0-9]+]], 4, 3
56 ; CHECK: cmpb [[REG1:[0-9]+]], 4, 3
75 ; CHECK: cmpb [[REG1:[0-9]+]], 4, 3
101 ; CHECK: cmpb [[REG1:[0-9]+]], 4, 3
127 ; CHECK: cmpb [[REG4:[0-9]+]], 4, 3
151 ; CHECK: cmpb [[REG4:[0-9]+]], 4, 3
198 ; CHECK: cmpb 3, 3, 4
Dcmpb-ppc32.ll19 ; CHECK: cmpb [[REG1:[0-9]+]], 4, 3
44 ; CHECK: cmpb 3, 4, 3
/external/llvm/test/CodeGen/PowerPC/
Dcmpb.ll19 ; CHECK: cmpb [[REG1:[0-9]+]], 4, 3
37 ; CHECK: cmpb [[REG1:[0-9]+]], 4, 3
56 ; CHECK: cmpb [[REG1:[0-9]+]], 4, 3
75 ; CHECK: cmpb [[REG1:[0-9]+]], 4, 3
101 ; CHECK: cmpb [[REG1:[0-9]+]], 4, 3
127 ; CHECK: cmpb [[REG4:[0-9]+]], 4, 3
151 ; CHECK: cmpb [[REG4:[0-9]+]], 4, 3
198 ; CHECK: cmpb 3, 3, 4
Dcmpb-ppc32.ll19 ; CHECK: cmpb [[REG1:[0-9]+]], 4, 3
44 ; CHECK: cmpb 3, 4, 3
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Hexagon/
Dxtype_pred.txt12 # CHECK: p3 = cmpb.gt(r17,r21)
14 # CHECK: p3 = cmpb.eq(r17,r21)
16 # CHECK: p3 = cmpb.gtu(r17,r21)
18 # CHECK: p3 = cmpb.eq(r17,#21)
20 # CHECK: p3 = cmpb.gt(r17,#21)
22 # CHECK: p3 = cmpb.gtu(r17,#21)
/external/llvm/test/MC/Disassembler/Hexagon/
Dxtype_pred.txt12 # CHECK: p3 = cmpb.gt(r17, r21)
14 # CHECK: p3 = cmpb.eq(r17, r21)
16 # CHECK: p3 = cmpb.gtu(r17, r21)
18 # CHECK: p3 = cmpb.eq(r17, #21)
20 # CHECK: p3 = cmpb.gt(r17, #21)
22 # CHECK: p3 = cmpb.gtu(r17, #21)
/external/swiftshader/third_party/LLVM/test/Transforms/SimplifyCFG/
D2008-07-13-InfLoopMiscompile.ll17 %cmpb = icmp eq i1 %cmpa, false ; <i1> [#uses=2]
18 br i1 %cmpb, label %monkeyblock, label %beeblock
21 br i1 %cmpb, label %cowblock, label %monkeyblock
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Hexagon/
Dout_of_range.s6 p0 = cmpb.eq(r0, #-257)
9 p0 = cmpb.eq(r0, #256)
/external/llvm/test/MC/Hexagon/
Dout_of_range.s6 p0 = cmpb.eq(r0, #-257)
9 p0 = cmpb.eq(r0, #256)
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/
DI86-64.s709 cmpb $0, 485498096 label
713 cmpb $0, 64(%rdx) label
717 cmpb $0, 64(%rdx,%rax,4) label
721 cmpb $0, -64(%rdx,%rax,4) label
725 cmpb $0, 64(%rdx,%rax) label
729 cmpb $0, %al label
733 cmpb $0, %r14b label
737 cmpb $0, (%rdx) label
741 cmpb 485498096, %r14b label
745 cmpb 64(%rdx), %r14b label
[all …]
/external/llvm/test/Transforms/SimplifyCFG/
D2008-07-13-InfLoopMiscompile.ll35 %cmpb = icmp eq i1 %cmpa, false ; <i1> [#uses=2]
36 br i1 %cmpb, label %monkeyblock, label %beeblock
39 br i1 %cmpb, label %cowblock, label %monkeyblock
Dpreserve-branchweights.ll416 define i32 @SimplifyCondBranchToCondBranch(i1 %cmpa, i1 %cmpb) {
419 ; CHECK-NEXT: [[BRMERGE:%.*]] = or i1 %cmpa, %cmpb
428 br i1 %cmpb, label %block3, label %exit, !prof !14
441 define i32 @SimplifyCondBranchToCondBranchSwap(i1 %cmpa, i1 %cmpb) {
445 ; CHECK-NEXT: [[CMPB_NOT:%.*]] = xor i1 %cmpb, true
455 br i1 %cmpb, label %exit, label %block3, !prof !14
466 define i32 @SimplifyCondBranchToCondBranchSwapMissingWeight(i1 %cmpa, i1 %cmpb) {
470 ; CHECK-NEXT: [[CMPB_NOT:%.*]] = xor i1 %cmpb, true
480 br i1 %cmpb, label %exit, label %block3
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SimplifyCFG/
D2008-07-13-InfLoopMiscompile.ll35 %cmpb = icmp eq i1 %cmpa, false ; <i1> [#uses=2]
36 br i1 %cmpb, label %monkeyblock, label %beeblock
39 br i1 %cmpb, label %cowblock, label %monkeyblock
Dimplied-and-or.ll126 %cmpb = icmp eq i32 %b, 0
128 %and1 = and i1 %cmpa, %cmpb
156 %cmpb = icmp eq i32 %b, 0
163 %and1 = and i1 %cmpa, %cmpb
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/
Dcmpbeq.ll2 ; Check that we generate 'cmpb.eq' instruction for a byte comparision.
15 ; CHECK: cmpb.eq(r{{[0-9]+}},r{{[0-9]+}})
Dcmpb-dec-imm.ll4 ; Check that we generate 'cmpb.gtu' instruction for a byte comparision
7 ; with the selected cmpb.gtu pattern
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dshrink-compare.ll19 ; CHECK: cmpb $47, (%{{rdi|rcx}})
35 ; CHECK: cmpb $47, %{{dil|cl}}
/external/llvm/test/Transforms/IndVarSimplify/
D2012-10-19-congruent-constant.ll10 %phi2 = phi i1 [ false, %entry ], [ %cmpb, %for.body ]
14 %cmpb = icmp sgt i32 %i.07, 100
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/IndVarSimplify/
D2012-10-19-congruent-constant.ll10 %phi2 = phi i1 [ false, %entry ], [ %cmpb, %for.body ]
14 %cmpb = icmp sgt i32 %i.07, 100

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