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Searched refs:conv23 (Results 1 – 21 of 21) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/JumpThreading/
Dpr9331.ll22 %conv23 = zext i8 %p_44.addr.1 to i64
23 %xor = xor i64 %conv23, 1
24 %tobool.i = icmp eq i64 %conv23, 0
28 %div.i = udiv i64 %xor, %conv23
32 %cond.i = phi i64 [ %div.i, %cond.false.i ], [ %conv23, %if.end21 ]
/external/llvm/test/Transforms/JumpThreading/
Dpr9331.ll22 %conv23 = zext i8 %p_44.addr.1 to i64
23 %xor = xor i64 %conv23, 1
24 %tobool.i = icmp eq i64 %conv23, 0
28 %div.i = udiv i64 %xor, %conv23
32 %cond.i = phi i64 [ %div.i, %cond.false.i ], [ %conv23, %if.end21 ]
/external/swiftshader/third_party/LLVM/test/Transforms/JumpThreading/
Dpr9331.ll22 %conv23 = zext i8 %p_44.addr.1 to i64
23 %xor = xor i64 %conv23, 1
24 %tobool.i = icmp eq i64 %conv23, 0
28 %div.i = udiv i64 %xor, %conv23
32 %cond.i = phi i64 [ %div.i, %cond.false.i ], [ %conv23, %if.end21 ]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dpr35103.ll23 %conv23 = trunc i64 %shr22 to i32
24 %add24 = add nuw nsw i32 %add11, %conv23
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dlicm-remat.ll78 %conv23 = zext i32 %add22 to i64
84 %cmp30233 = icmp ugt i64 %conv23, 0
124 %cmp.i.i198 = icmp ult i64 %sub.i197, %conv23
125 %.sroa.speculated.i199 = select i1 %cmp.i.i198, i64 %sub.i197, i64 %conv23
137 %add.ptr50 = getelementptr inbounds i8, i8* %add.ptr24, i64 %conv23
Dppc64-P9-vabsd.ll165 %conv23 = zext i8 %vecext22 to i32
166 %sub24 = sub nsw i32 %conv21, %conv23
/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/
Dfpconst.pnacl.ll87 %conv23 = fadd float %call20, 2.500000e-01
148 … ], [ %add32, %sw.bb30 ], [ %add29, %sw.bb27 ], [ %add26, %sw.bb24 ], [ %conv23, %sw.bb19 ], [ %co…
211 %conv23 = fadd float %call20, 2.500000e-01
272 … ], [ %add32, %sw.bb30 ], [ %add29, %sw.bb27 ], [ %add26, %sw.bb24 ], [ %conv23, %sw.bb19 ], [ %co…
337 %conv23 = fpext float %call22 to double
338 %add24 = fadd double %conv23, 2.500000e-01
473 %conv23 = fpext float %call22 to double
474 %add24 = fadd double %conv23, 2.500000e-01
Dreorder-pooled-constants.ll74 %conv23 = fadd float %call20, 2.500000e-01
135 … ], [ %add32, %sw.bb30 ], [ %add29, %sw.bb27 ], [ %add26, %sw.bb24 ], [ %conv23, %sw.bb19 ], [ %co…
198 %conv23 = fadd float %call20, 2.500000e-01
259 … ], [ %add32, %sw.bb30 ], [ %add29, %sw.bb27 ], [ %add26, %sw.bb24 ], [ %conv23, %sw.bb19 ], [ %co…
324 %conv23 = fpext float %call22 to double
325 %add24 = fadd double %conv23, 2.500000e-01
460 %conv23 = fpext float %call22 to double
461 %add24 = fadd double %conv23, 2.500000e-01
/external/libaom/libaom/av1/common/x86/
Dav1_convolve_scale_sse4.c162 const __m128i conv23 = _mm_hadd_epi32(conv2, conv3); in vfilter8() local
163 __m128i conv = _mm_hadd_epi32(conv01, conv23); in vfilter8()
394 const __m128i conv23 = _mm_hadd_epi32(conv2, conv3); in highbd_vfilter8() local
395 __m128i conv = _mm_hadd_epi32(conv01, conv23); in highbd_vfilter8()
/external/llvm/test/Transforms/SLPVectorizer/AArch64/
Dgather-reduce.ll84 %conv23 = zext i16 %9 to i32
88 %sub26 = sub nsw i32 %conv23, %conv25
203 %conv23 = zext i16 %9 to i64
207 %sub26 = sub nsw i64 %conv23, %conv25
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/
Dswp-epilog-phi10.ll23 %conv23.epil = zext i8 %0 to i32
60 %add54.epil = add i32 %add51.epil, %conv23.epil
Dbit-rie.ll55 %conv23 = ashr exact i32 %sext133, 16
56 %12 = tail call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s0(i32 %L_temp.0142, i32 %conv23, i32 %conv23)
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopReroll/
Dindvar_with_ext.ll118 %conv23 = phi i32 [ %conv, %for.body ], [ 0, %for.body.preheader ]
125 %add = or i32 %conv23, 1
/external/llvm/test/Transforms/LoopReroll/
Dindvar_with_ext.ll120 %conv23 = phi i32 [ %conv, %for.body ], [ 0, %for.body.preheader ]
127 %add = or i32 %conv23, 1
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/AArch64/
Dgather-reduce.ll227 %conv23 = zext i16 %9 to i32
231 %sub26 = sub nsw i32 %conv23, %conv25
488 %conv23 = zext i16 %9 to i64
492 %sub26 = sub nsw i64 %conv23, %conv25
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
D2009-06-02-RewriterBug.ll183 %conv23 = zext i32 undef to i64 ; <i64> [#uses=1]
230 %add248 = add i64 %add213, %conv23 ; <i64> [#uses=2]
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
D2009-06-02-RewriterBug.ll183 %conv23 = zext i32 undef to i64 ; <i64> [#uses=1]
230 %add248 = add i64 %add213, %conv23 ; <i64> [#uses=2]
/external/llvm/test/CodeGen/X86/
D2009-06-02-RewriterBug.ll183 %conv23 = zext i32 undef to i64 ; <i64> [#uses=1]
230 %add248 = add i64 %add213, %conv23 ; <i64> [#uses=2]
/external/tensorflow/tensorflow/core/kernels/
Dnn_ops_test.cc301 BM_ConvFloatFwd(32, 17, 17, 192, 224, 3, 3, 1, SAME, conv23);
417 BM_ConvFloatBkInAndFilter(32, 17, 17, 192, 224, 3, 3, 1, SAME, conv23);
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Dhf16call32.ll154 %conv23 = fpext float %36 to double
164 …6 x i8]* @.str1, i32 0, i32 0), double %33, double %34, double %conv22, double %conv23, i32 %and28)
/external/llvm/test/CodeGen/Mips/
Dhf16call32.ll154 %conv23 = fpext float %36 to double
164 …6 x i8]* @.str1, i32 0, i32 0), double %33, double %34, double %conv22, double %conv23, i32 %and28)