| /external/u-boot/drivers/core/ |
| D | simple-bus.c | 33 ret = dev_read_u32_array(dev, "ranges", cell, ARRAY_SIZE(cell)); in simple_bus_post_bind()
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| D | read.c | 186 int dev_read_u32_array(struct udevice *dev, const char *propname, in dev_read_u32_array() function
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| /external/u-boot/include/dm/ |
| D | read.h | 372 int dev_read_u32_array(struct udevice *dev, const char *propname,
604 static inline int dev_read_u32_array(struct udevice *dev, const char *propname, in dev_read_u32_array() function
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| /external/u-boot/drivers/pinctrl/broadcom/ |
| D | pinctrl-bcm283x.c | 69 len & 0x3 || dev_read_u32_array(config, "brcm,pins", pin_arr, in bcm283x_pinctrl_set_state()
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| /external/u-boot/drivers/ram/stm32mp1/ |
| D | stm32mp1_ram.c | 98 ret = dev_read_u32_array(dev, param[idx].name, in stm32mp1_ddr_setup()
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| /external/u-boot/drivers/mmc/ |
| D | rockchip_dw_mmc.c | 79 if (dev_read_u32_array(dev, "clock-freq-min-max", priv->minmax, 2)) { in rockchip_dwmmc_ofdata_to_platdata()
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| /external/u-boot/drivers/ram/rockchip/ |
| D | sdram_rk3188.c | 821 ret = dev_read_u32_array(dev, "rockchip,pctl-timing", in rk3188_dmc_ofdata_to_platdata()
828 ret = dev_read_u32_array(dev, "rockchip,phy-timing", in rk3188_dmc_ofdata_to_platdata()
835 ret = dev_read_u32_array(dev, "rockchip,sdram-params", in rk3188_dmc_ofdata_to_platdata()
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| D | sdram_rk3288.c | 977 ret = dev_read_u32_array(dev, "rockchip,pctl-timing", in rk3288_dmc_ofdata_to_platdata()
984 ret = dev_read_u32_array(dev, "rockchip,phy-timing", in rk3288_dmc_ofdata_to_platdata()
991 ret = dev_read_u32_array(dev, "rockchip,sdram-params", in rk3288_dmc_ofdata_to_platdata()
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| D | sdram_rk3399.c | 1093 ret = dev_read_u32_array(dev, "rockchip,sdram-params", in rk3399_dmc_ofdata_to_platdata()
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| /external/u-boot/drivers/gpio/ |
| D | mpc8xxx_gpio.c | 183 dev_read_u32_array(dev, "reg", reg, 2); in mpc8xxx_gpio_ofdata_to_platdata()
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| /external/u-boot/drivers/clk/ |
| D | clk-uclass.c | 208 ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates); in clk_set_default_rates()
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| D | clk_stm32mp1.c | 1509 ret = dev_read_u32_array(dev, "st,clksrc", clksrc, CLKSRC_NB); in stm32mp1_clktree()
1515 ret = dev_read_u32_array(dev, "st,clkdiv", clkdiv, CLKDIV_NB); in stm32mp1_clktree()
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| /external/u-boot/drivers/pinctrl/rockchip/ |
| D | pinctrl_rv1108.c | 508 ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell)); in rv1108_pinctrl_get_periph_id()
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| D | pinctrl_rk3399.c | 412 ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell)); in rk3399_pinctrl_get_periph_id()
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| D | pinctrl_rk3036.c | 603 ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell)); in rk3036_pinctrl_get_periph_id()
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| D | pinctrl_rk3328.c | 633 ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell)); in rk3328_pinctrl_get_periph_id()
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| D | pinctrl_rk3368.c | 661 ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell)); in rk3368_pinctrl_get_periph_id()
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| D | pinctrl_rk3188.c | 752 ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell)); in rk3188_pinctrl_get_periph_id()
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| D | pinctrl_rk3288.c | 599 ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell)); in rk3288_pinctrl_get_periph_id()
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| /external/u-boot/arch/arm/mach-tegra/ |
| D | clock.c | 663 err = dev_read_u32_array(dev, "clocks", cell, ARRAY_SIZE(cell)); in clock_decode_periph_id()
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| /external/u-boot/drivers/mtd/nand/ |
| D | tegra_nand.c | 910 err = dev_read_u32_array(dev, "nvidia,timing", config->timing, in fdt_decode_nand()
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| /external/u-boot/drivers/net/ |
| D | designware.c | 818 ret = dev_read_u32_array(dev, "snps,reset-delays-us", in designware_eth_ofdata_to_platdata()
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