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Searched refs:div3 (Results 1 – 25 of 26) sorted by relevance

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/external/u-boot/arch/arm/mach-s5pc1xx/include/mach/
Dclock.h31 unsigned int div3; member
67 unsigned int div3; member
/external/llvm/test/CodeGen/PowerPC/
Dppc64-r2-alloc.ll10 %div3 = sdiv i32 %div2, %d
11 %div4 = sdiv i32 %div3, %d
68 %div61 = sdiv i32 %div60, %div3
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dppc64-r2-alloc.ll10 %div3 = sdiv i32 %div2, %d
11 %div4 = sdiv i32 %div3, %d
68 %div61 = sdiv i32 %div60, %div3
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dlds-oqap-crash.ll21 %div3 = udiv i32 %div2, %a
22 %div4 = udiv i32 %div3, %b
Dstructurize.ll72 %div3 = udiv i32 %div2, %a
73 %div4 = udiv i32 %div3, %b
/external/llvm/test/CodeGen/AMDGPU/
Dlds-oqap-crash.ll21 %div3 = udiv i32 %div2, %a
22 %div4 = udiv i32 %div3, %b
Dstructurize.ll72 %div3 = udiv i32 %div2, %a
73 %div4 = udiv i32 %div3, %b
/external/llvm/test/CodeGen/SystemZ/
Dfp-div-01.ll109 %div3 = fdiv float %div2, %val3
110 %div4 = fdiv float %div3, %val4
Dfp-div-02.ll111 %div3 = fdiv double %div2, %val3
112 %div4 = fdiv double %div3, %val4
Dint-div-05.ll204 %div3 = udiv i64 %div2, %val3
205 %div4 = udiv i64 %div3, %val4
Dint-div-02.ll202 %div3 = udiv i32 %div2, %val3
203 %div4 = udiv i32 %div3, %val4
Dint-div-04.ll192 %div3 = sdiv i64 %div2, %val3
193 %div4 = sdiv i64 %div3, %val4
Dint-div-01.ll242 %div3 = sdiv i32 %div2, %val3
243 %div4 = sdiv i32 %div3, %val4
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dfp-div-02.ll111 %div3 = fdiv double %div2, %val3
112 %div4 = fdiv double %div3, %val4
Dfp-div-01.ll111 %div3 = fdiv float %div2, %val3
112 %div4 = fdiv float %div3, %val4
Dint-div-02.ll202 %div3 = udiv i32 %div2, %val3
203 %div4 = udiv i32 %div3, %val4
Dint-div-05.ll204 %div3 = udiv i64 %div2, %val3
205 %div4 = udiv i64 %div3, %val4
Dint-div-04.ll192 %div3 = sdiv i64 %div2, %val3
193 %div4 = sdiv i64 %div3, %val4
Dint-div-01.ll242 %div3 = sdiv i32 %div2, %val3
243 %div4 = sdiv i32 %div3, %val4
/external/u-boot/arch/arm/mach-keystone/include/mach/
Dclock_defs.h23 u32 div3; /* 20 */ member
/external/swiftshader/third_party/LLVM/test/CodeGen/SystemZ/
D08-DivRem.ll27 define i32 @div3(i32 %a, i32 %b) nounwind readnone {
D08-DivRemMemOp.ll44 define i32 @div3(i32 %a, i32* %b) nounwind readnone {
/external/llvm/test/CodeGen/WebAssembly/
Dreg-stackify.ll209 %div3 = sdiv i32 %e, %f
211 %div5 = sdiv i32 %div3, %div4
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/WebAssembly/
Dreg-stackify.ll208 %div3 = sdiv i32 %e, %f
210 %div5 = sdiv i32 %div3, %div4
/external/u-boot/arch/arm/dts/
Dat91sam9n12.dtsi176 atmel,master-clk-have-div3-pres;

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