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Searched refs:divb (Results 1 – 25 of 52) sorted by relevance

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/external/llvm/test/CodeGen/X86/
Datom-bypass-slow-division.ll10 ; CHECK: divb
23 ; CHECK: divb
35 ; CHECK: divb
39 ; CHECK-NOT: divb
49 ; CHECK: divb
51 ; CHECK: divb
71 ; CHECK-NOT: divb
80 ; CHECK-NOT: divb
89 ; CHECK-NOT: divb
100 ; CHECK: divb
[all …]
Dslow-div.ll1 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+idivl-to-divb < %s | FileCheck -check-prefix=D…
9 ; DIV32: divb
11 ; DIV64-NOT: divb
32 ; DIV32-NOT: divb
39 ; DIV32-NOT: divb
Ddivrem8_ext.ll8 ; CHECK: divb
21 ; CHECK: divb
30 ; CHECK: divb [[REG_X:%[a-z0-9]+]]
41 ; CHECK: divb
103 ; CHECK: divb
Ddiv8.ll15 ; Insist on i8->i32 zero extension, even though divb demands only i16:
17 ; CHECK: divb
Dscalar_widen_div.ll49 ; CHECK: divb
50 ; CHECK: divb
51 ; CHECK: divb
52 ; CHECK-NOT: divb
Danyext.ll12 ; X32-NEXT: divb {{[0-9]+}}(%esp)
21 ; X64-NEXT: divb %sil
Dfast-isel-divrem.ll32 ; CHECK: divb
42 ; CHECK: divb
Dinline-asm-R-constraint.ll15 …call void asm "\09\09movw\09$2, %ax\09\09\0A\09\09divb\09$3\09\09\09\0A\09\09movb\09%al, $0\09\0A\…
Durem-power-of-two.ll61 ; CHECK-NEXT: divb %sil
Dmisched-new.ll89 ; TOPDOWN: divb
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Ddivrem8_ext.ll10 ; X32-NEXT: divb {{[0-9]+}}(%esp)
20 ; X64-NEXT: divb %sil
36 ; X32-NEXT: divb {{[0-9]+}}(%esp)
45 ; X64-NEXT: divb %sil
59 ; X32-NEXT: divb %cl
69 ; X64-NEXT: divb %sil
84 ; X32-NEXT: divb {{[0-9]+}}(%esp)
93 ; X64-NEXT: divb %sil
204 ; X32-NEXT: divb {{[0-9]+}}(%esp)
215 ; X64-NEXT: divb %sil
Dbypass-slow-division-tune.ll13 ; ATOM: divb
16 ; REST-NOT: divb
55 ; CHECK-NOT: divb
63 ; CHECK-NOT: divb
Dbypass-slow-division-32.ll3 ; RUN: llc < %s -mattr=+idivl-to-divb -mtriple=i686-linux | FileCheck %s
21 ; CHECK-NEXT: divb %cl
45 ; CHECK-NEXT: divb %cl
69 ; CHECK-NEXT: divb %cl
107 ; CHECK-NEXT: divb %bl
114 ; CHECK-NEXT: divb %bl
212 ; CHECK-NEXT: divb %cl
234 ; CHECK-NEXT: divb %cl
Ddiv8.ll15 ; Insist on i8->i32 zero extension, even though divb demands only i16:
17 ; CHECK: divb
Danyext.ll12 ; X32-NEXT: divb {{[0-9]+}}(%esp)
21 ; X64-NEXT: divb %sil
Dfast-isel-divrem.ll32 ; CHECK: divb
42 ; CHECK: divb
Dinline-asm-R-constraint.ll15 …call void asm "\09\09movw\09$2, %ax\09\09\0A\09\09divb\09$3\09\09\09\0A\09\09movb\09%al, $0\09\0A\…
Dpr38539.ll42 ; X64-NEXT: divb %al
125 ; X86-NEXT: divb %dh
190 ; X64-NEXT: divb %al
265 ; X86-NEXT: divb %bl
Durem-power-of-two.ll85 ; X86-NEXT: divb %cl
95 ; X64-NEXT: divb %sil
D2006-11-17-IllegalMove.ll15 ; CHECK-NEXT: divb %al
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Ddiv8.ll15 ; Insist on i8->i32 zero extension, even though divb demands only i16:
17 ; CHECK: divb
Dscalar_widen_div.ll46 ; CHECK: divb
47 ; CHECK: divb
48 ; CHECK: divb
49 ; CHECK-NOT: divb
Dinline-asm-R-constraint.ll15 …call void asm "\09\09movw\09$2, %ax\09\09\0A\09\09divb\09$3\09\09\09\0A\09\09movb\09%al, $0\09\0A\…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/
DI86-32.s677 divb -485498096(%edx,%eax,4) label
681 divb 485498096(%edx,%eax,4) label
685 divb 485498096(%edx) label
689 divb 485498096 label
693 divb 64(%edx,%eax) label
697 divb (%edx) label
DI86-64.s1061 divb 485498096 label
1065 divb 64(%rdx) label
1069 divb 64(%rdx,%rax,4) label
1073 divb -64(%rdx,%rax,4) label
1077 divb 64(%rdx,%rax) label
1081 divb %r14b label
1085 divb (%rdx) label

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