Searched refs:dllcr (Results 1 – 4 of 4) sorted by relevance
/external/u-boot/arch/nds32/lib/ |
D | asm-offsets.c | 65 OFFSET(DWCDDR21MCTL_DLLCR0, dwcddr21mctl, dllcr[0]); /* 0x24 */ in main() 66 OFFSET(DWCDDR21MCTL_DLLCR1, dwcddr21mctl, dllcr[1]); /* 0x28 */ in main() 67 OFFSET(DWCDDR21MCTL_DLLCR2, dwcddr21mctl, dllcr[2]); /* 0x2c */ in main() 68 OFFSET(DWCDDR21MCTL_DLLCR3, dwcddr21mctl, dllcr[3]); /* 0x30 */ in main() 69 OFFSET(DWCDDR21MCTL_DLLCR4, dwcddr21mctl, dllcr[4]); /* 0x34 */ in main() 70 OFFSET(DWCDDR21MCTL_DLLCR5, dwcddr21mctl, dllcr[5]); /* 0x38 */ in main() 71 OFFSET(DWCDDR21MCTL_DLLCR6, dwcddr21mctl, dllcr[6]); /* 0x3c */ in main() 72 OFFSET(DWCDDR21MCTL_DLLCR7, dwcddr21mctl, dllcr[7]); /* 0x40 */ in main() 73 OFFSET(DWCDDR21MCTL_DLLCR8, dwcddr21mctl, dllcr[8]); /* 0x44 */ in main() 74 OFFSET(DWCDDR21MCTL_DLLCR9, dwcddr21mctl, dllcr[9]); /* 0x48 */ in main()
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/external/u-boot/arch/arm/mach-sunxi/ |
D | dram_sun4i.c | 137 clrsetbits_le32(&dram->dllcr[0], 0x3f << 6, in mctl_enable_dll0() 139 clrsetbits_le32(&dram->dllcr[0], DRAM_DLLCR_NRESET, DRAM_DLLCR_DISABLE); in mctl_enable_dll0() 142 clrbits_le32(&dram->dllcr[0], DRAM_DLLCR_NRESET | DRAM_DLLCR_DISABLE); in mctl_enable_dll0() 145 clrsetbits_le32(&dram->dllcr[0], DRAM_DLLCR_DISABLE, DRAM_DLLCR_NRESET); in mctl_enable_dll0() 171 clrsetbits_le32(&dram->dllcr[i], 0xf << 14, in mctl_enable_dllx() 173 clrsetbits_le32(&dram->dllcr[i], DRAM_DLLCR_NRESET, in mctl_enable_dllx() 180 clrbits_le32(&dram->dllcr[i], DRAM_DLLCR_NRESET | in mctl_enable_dllx() 185 clrsetbits_le32(&dram->dllcr[i], DRAM_DLLCR_DISABLE, in mctl_enable_dllx()
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/external/u-boot/arch/arm/include/asm/arch-sunxi/ |
D | dram_sun4i.h | 45 u32 dllcr[5]; /* 0x204 dll control register 0(byte 0) */ member
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/external/u-boot/include/synopsys/ |
D | dwcddr21mctl.h | 24 unsigned int dllcr[10]; /* DLL Control */ member
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