Searched refs:dmacr (Results 1 – 5 of 5) sorted by relevance
27 u32 dmacr; member99 writel(0, &lslave->regs->dmacr); /* do not do DMAs */ in spi_setup_slave()
30 u32 dmacr; member
67 debug("dmacr: \t\t0x%08x\n", readl(®s->dmacr)); in rkspi_dump_regs()
125 u32 dmacr; /* 0x10 - DMA Control reg */ member404 writel(ZYNQ_GEM_DMACR_INIT, ®s->dmacr); in zynq_gem_init()
42 u32 dmacr; member482 writel_with_flush(0x00004444, &port_mmio->dmacr); in ahci_port_start()