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Searched refs:dram_pll_cfg (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-sunxi/
Dclock_sun8i_a83t.h65 u32 dram_pll_cfg; /* 0xf8 PLL_DDR cfg register */ member
Dclock_sun6i.h67 u32 dram_pll_cfg; /* 0xf8 PLL_DDR cfg register, A33 only */ member
/external/u-boot/arch/arm/mach-sunxi/
Ddram_sun8i_a33.c303 clrsetbits_le32(&ccm->dram_pll_cfg, CCM_DRAMPLL_CFG_SRC_MASK, in mctl_sys_init()