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Searched refs:dram_pll_cfg1 (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-mx8m/
Dimx-regs.h232 u32 dram_pll_cfg1; member
/external/u-boot/arch/arm/mach-imx/mx8m/
Dclock.c128 pll_cfg1 = readl(&ana_pll->dram_pll_cfg1); in decode_sscg_pll()