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Searched refs:drex1 (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/arch/arm/mach-exynos/
Ddmc_init_ddr3.c447 struct exynos5420_dmc *drex0, *drex1; in ddr3_mem_ctrl_init() local
459 drex1 = (struct exynos5420_dmc *)(samsung_get_base_dmc_ctrl() in ddr3_mem_ctrl_init()
546 writel(val, &drex1->phycontrol0); in ddr3_mem_ctrl_init()
555 &drex1->concontrol); in ddr3_mem_ctrl_init()
561 val = readl(&drex1->phystatus); in ddr3_mem_ctrl_init()
565 clrbits_le32(&drex1->concontrol, DFI_INIT_START); in ddr3_mem_ctrl_init()
568 update_reset_dll(&drex1->phycontrol0, DDR_MODE_DDR3); in ddr3_mem_ctrl_init()
601 &drex1->prechconfig0); in ddr3_mem_ctrl_init()
608 writel(mem->timing_ref, &drex1->timingref); in ddr3_mem_ctrl_init()
610 writel(mem->timing_row, &drex1->timingrow0); in ddr3_mem_ctrl_init()
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