Searched refs:dsgcr (Results 1 – 10 of 10) sorted by relevance
148 writel(MCTL_DSGCR, &mctl_phy->dsgcr); in mctl_channel_init()283 clrbits_le32(&mctl_phy1->dsgcr, MCTL_DSGCR_ENABLE); in mctl_com_init()
630 clrbits_le32(&mctl_phy->dsgcr, (3 << 6)); in mctl_channel_init()733 setbits_le32(&mctl_phy->dsgcr, 0xf << 24); /* unclear what this is... */ in mctl_channel_init()
120 u32 dsgcr; member
152 u32 dsgcr; /* 0x2C DDR System General Configuration*/ member
128 DDRPHY_REG_REG(dsgcr),
104 u32 dsgcr; /* 0x84 DRAM system general config register */ member
179 u32 dsgcr; /* 0x40 dram system general config register */ member
168 u32 dsgcr; /* 0x2c dram system general config register */ member
176 u32 dsgcr; member
334 clrsetbits_le32(&publ->dsgcr, in phy_cfg()