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Searched refs:dv_pll1_regs (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-davinci/
Ddm365_lowlevel.c107 clrbits_le32(&dv_pll1_regs->pllctl, PLLCTL_PLLPWRDN); in dm365_pll2_init()
114 clrbits_le32(&dv_pll1_regs->pllctl, PLLCTL_RES_9); in dm365_pll2_init()
115 setbits_le32(&dv_pll1_regs->pllctl, in dm365_pll2_init()
122 clrbits_le32(&dv_pll1_regs->pllctl, PLLCTL_PLLENSRC); in dm365_pll2_init()
125 clrbits_le32(&dv_pll1_regs->pllctl, PLLCTL_PLLEN); in dm365_pll2_init()
130 setbits_le32(&dv_pll1_regs->pllctl, PLLCTL_PLLRST); in dm365_pll2_init()
135 clrbits_le32(&dv_pll1_regs->pllctl, PLLCTL_PLLRST); in dm365_pll2_init()
138 writel(pllm, &dv_pll1_regs->pllm); in dm365_pll2_init()
139 writel(prediv, &dv_pll1_regs->prediv); in dm365_pll2_init()
141 writel(PLL_POSTDEN, &dv_pll1_regs->postdiv); in dm365_pll2_init()
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/external/u-boot/arch/arm/mach-davinci/include/mach/
Dpll_defs.h75 #define dv_pll1_regs ((struct dv_pll_regs *)DAVINCI_PLL_CNTRL1_BASE) macro