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/external/mesa3d/src/mesa/sparc/
Dnorm.S62 fmuls %f0, M4, %f5 ! FGM Group
67 fmuls %f2, M2, %f10 ! FGM Group f5 available
69 fadds %f5, %f6, %f5 ! FGA
73 fadds %f5, %f0, %f5 ! FGA Group stall f0,f5 available
80 fmuls %f5, %f5, %f8 ! FGM Group f5 available
91 fmuls %f5, %f6, %f5
92 st %f5, [%g3 + 0x04] ! out[i][1] = ty * scale
127 fmuls %f0, M4, %f5 ! FGM Group
132 fmuls %f2, M2, %f10 ! FGM Group f5 available
134 fadds %f5, %f6, %f5 ! FGA
[all …]
Dxform.S252 fmuls %f4, M0, %f5 ! FGM Group
255 st M13, [%g2 + 0x04] ! LSU Group, f5 available
256 fadds %f5, M12, %f6 ! FGA
302 fmuls %f4, M0, %f5 ! FGM Group
311 fadds %f5, M12, %f5 ! FGA Group, f5 available
312 st %f5, [%g2 + 0x10] ! LSU
463 fmuls %f0, M3, %f5 ! FGM Group
470 fadds %f5, M15, %f5 ! FGA Group f5 available
478 fadds %f5, %f9, %f5 ! FGA Group f9 available
479 st %f5, [%g2 + 0x0c] ! LSU
[all …]
/external/webrtc/webrtc/modules/audio_processing/aec/
Daec_rdft_mips.c272 float f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14; in cft1st_128_mips() local
510 [f4] "=&f" (f4), [f5] "=&f" (f5), [f6] "=&f" (f6), [f7] "=&f" (f7), in cft1st_128_mips()
521 float f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14; in cftmdl_128_mips() local
566 [f4] "=&f" (f4), [f5] "=&f" (f5), [f6] "=&f" (f6), [f7] "=&f" (f7), in cftmdl_128_mips()
623 [f4] "=&f" (f4), [f5] "=&f" (f5), [f6] "=&f" (f6), [f7] "=&f" (f7), in cftmdl_128_mips()
711 [f4] "=&f" (f4), [f5] "=&f" (f5), [f6] "=&f" (f6), [f7] "=&f" (f7), in cftmdl_128_mips()
798 [f4] "=&f" (f4), [f5] "=&f" (f5), [f6] "=&f" (f6), [f7] "=&f" (f7), in cftmdl_128_mips()
807 float f0, f1, f2, f3, f4, f5, f6, f7, f8; in cftfsub_128_mips() local
856 [f4] "=&f" (f4), [f5] "=&f" (f5), [f6] "=&f" (f6), [f7] "=&f" (f7), in cftfsub_128_mips()
865 float f0, f1, f2, f3, f4, f5, f6, f7, f8; in cftbsub_128_mips() local
[all …]
Daec_core_mips.c345 float f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13; in WebRtcAec_FilterFar_mips() local
430 [f3] "=&f" (f3), [f4] "=&f" (f4), [f5] "=&f" (f5), in WebRtcAec_FilterFar_mips()
465 float f0, f1, f2, f3, f4, f5, f6 ,f7, f8, f9, f10, f11, f12; in WebRtcAec_FilterAdaptation_mips() local
528 [f3] "=&f" (f3), [f4] "=&f" (f4), [f5] "=&f" (f5), in WebRtcAec_FilterAdaptation_mips()
579 [f3] "=&f" (f3), [f4] "=&f" (f4), [f5] "=&f" (f5), in WebRtcAec_FilterAdaptation_mips()
637 [f3] "=&f" (f3), [f4] "=&f" (f4), [f5] "=&f" (f5), in WebRtcAec_FilterAdaptation_mips()
/external/llvm/test/MC/Mips/micromips32r6/
Dvalid.s141 add.s $f3, $f4, $f5 # CHECK: add.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0x30]
143 sub.s $f3, $f4, $f5 # CHECK: sub.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0x70]
145 mul.s $f3, $f4, $f5 # CHECK: mul.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0xb0]
147 div.s $f3, $f4, $f5 # CHECK: div.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0xf0]
149 maddf.s $f3, $f4, $f5 # CHECK: maddf.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x19,0xb8]
150 maddf.d $f3, $f4, $f5 # CHECK: maddf.d $f3, $f4, $f5 # encoding: [0x54,0xa4,0x1b,0xb8]
151 msubf.s $f3, $f4, $f5 # CHECK: msubf.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x19,0xf8]
152 msubf.d $f3, $f4, $f5 # CHECK: msubf.d $f3, $f4, $f5 # encoding: [0x54,0xa4,0x1b,0xf8]
157 max.s $f5, $f4, $f3 # CHECK: max.s $f5, $f4, $f3 # encoding: [0x54,0x64,0x28,0x0b]
158 max.d $f5, $f4, $f3 # CHECK: max.d $f5, $f4, $f3 # encoding: [0x54,0x64,0x2a,0x0b]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips32r6/
Dvalid.s175 add.s $f3, $f4, $f5 # CHECK: add.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0x30]
178 sub.s $f3, $f4, $f5 # CHECK: sub.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0x70]
181 mul.s $f3, $f4, $f5 # CHECK: mul.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0xb0]
184 div.s $f3, $f4, $f5 # CHECK: div.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0xf0]
187 maddf.s $f3, $f4, $f5 # CHECK: maddf.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x19,0xb8]
188 maddf.d $f3, $f4, $f5 # CHECK: maddf.d $f3, $f4, $f5 # encoding: [0x54,0xa4,0x1b,0xb8]
189 msubf.s $f3, $f4, $f5 # CHECK: msubf.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x19,0xf8]
190 msubf.d $f3, $f4, $f5 # CHECK: msubf.d $f3, $f4, $f5 # encoding: [0x54,0xa4,0x1b,0xf8]
197 max.s $f5, $f4, $f3 # CHECK: max.s $f5, $f4, $f3 # encoding: [0x54,0x64,0x28,0x0b]
198 max.d $f5, $f4, $f3 # CHECK: max.d $f5, $f4, $f3 # encoding: [0x54,0x64,0x2a,0x0b]
[all …]
/external/tcpdump/tests/
Dlacp-ev.out6 System 00:0e:83:16:f5:00, System Priority 32768, Key 13, Port 25, Port Priority 32768
16 System 00:0e:83:16:f5:00, System Priority 32768, Key 13, Port 25, Port Priority 32768
26 System 00:0e:83:16:f5:00, System Priority 32768, Key 13, Port 25, Port Priority 32768
81 00:0e:83:16:f5:10 > 01:80:c2:00:00:02, ethertype Slow Protocols (0x8809), length 124: LACPv1, lengt…
83 System 00:0e:83:16:f5:00, System Priority 32768, Key 13, Port 25, Port Priority 32768
111 00:0e:83:16:f5:10 > 01:80:c2:00:00:02, ethertype Slow Protocols (0x8809), length 124: LACPv1, lengt…
113 System 00:0e:83:16:f5:00, System Priority 32768, Key 13, Port 25, Port Priority 32768
121 00:0e:83:16:f5:10 > 01:80:c2:00:00:02, ethertype Slow Protocols (0x8809), length 124: LACPv1, lengt…
123 System 00:0e:83:16:f5:00, System Priority 32768, Key 13, Port 25, Port Priority 32768
131 00:0e:83:16:f5:10 > 01:80:c2:00:00:02, ethertype Slow Protocols (0x8809), length 124: LACPv1, lengt…
[all …]
/external/llvm/test/MC/Mips/micromips64r6/
Dvalid.s61 add.s $f3, $f4, $f5 # CHECK: add.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0x30]
63 sub.s $f3, $f4, $f5 # CHECK: sub.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0x70]
65 mul.s $f3, $f4, $f5 # CHECK: mul.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0xb0]
67 div.s $f3, $f4, $f5 # CHECK: div.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0xf0]
69 maddf.s $f3, $f4, $f5 # CHECK: maddf.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x19,0xb8]
70 maddf.d $f3, $f4, $f5 # CHECK: maddf.d $f3, $f4, $f5 # encoding: [0x54,0xa4,0x1b,0xb8]
71 msubf.s $f3, $f4, $f5 # CHECK: msubf.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x19,0xf8]
72 msubf.d $f3, $f4, $f5 # CHECK: msubf.d $f3, $f4, $f5 # encoding: [0x54,0xa4,0x1b,0xf8]
77 max.s $f5, $f4, $f3 # CHECK: max.s $f5, $f4, $f3 # encoding: [0x54,0x64,0x28,0x0b]
78 max.d $f5, $f4, $f3 # CHECK: max.d $f5, $f4, $f3 # encoding: [0x54,0x64,0x2a,0x0b]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dcortex-a57-misched-vfma.ll6 define float @Test1(float %f1, float %f2, float %f3, float %f4, float %f5, float %f6) {
35 ; f1 * f2 + f3 * f4 + f5 * f6 ==> VMULS, VMLAS, VMLAS
38 %mul3 = fmul float %f5, %f6
45 … float> %f1, <2 x float> %f2, <2 x float> %f3, <2 x float> %f4, <2 x float> %f5, <2 x float> %f6) {
74 ; f1 * f2 + f3 * f4 + f5 * f6 ==> VMULS, VMLAS, VMLAS
77 %mul3 = fmul <2 x float> %f5, %f6
83 define float @Test3(float %f1, float %f2, float %f3, float %f4, float %f5, float %f6) {
112 ; f1 * f2 + f3 * f4 + f5 * f6 ==> VMULS, VMLSS, VMLSS
115 %mul3 = fmul float %f5, %f6
122 … float> %f1, <2 x float> %f2, <2 x float> %f3, <2 x float> %f4, <2 x float> %f5, <2 x float> %f6) {
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/XCore/
Depilogue_prologue.ll122 ; CHECKFP-NEXT: bl f5
127 ; CHECKFP-NEXT: bl f5
163 ; CHECK-NEXT: bl f5
167 ; CHECK-NEXT: bl f5
176 declare void @f5(i32*)
181 call void @f5(i32* %1)
183 call void @f5(i32* %2)
195 ; CHECKFP-NEXT: bl f5
205 ; CHECK-NEXT: bl f5
211 call void @f5(i32* %1)
[all …]
/external/llvm/test/MC/Disassembler/Mips/micromips64r6/
Dvalid.txt48 0x54 0xa4 0x18 0x30 # CHECK: add.s $f3, $f4, $f5
50 0x54 0xa4 0x18 0x70 # CHECK: sub.s $f3, $f4, $f5
52 0x54 0xa4 0x18 0xb0 # CHECK: mul.s $f3, $f4, $f5
54 0x54 0xa4 0x18 0xf0 # CHECK: div.s $f3, $f4, $f5
56 0x54 0xa4 0x19 0xb8 # CHECK: maddf.s $f3, $f4, $f5
57 0x54 0xa4 0x1b 0xb8 # CHECK: maddf.d $f3, $f4, $f5
58 0x54 0xa4 0x19 0xf8 # CHECK: msubf.s $f3, $f4, $f5
59 0x54 0xa4 0x1b 0xf8 # CHECK: msubf.d $f3, $f4, $f5
64 0x54 0x64 0x28 0x0b # CHECK: max.s $f5, $f4, $f3
65 0x54 0x64 0x2a 0x0b # CHECK: max.d $f5, $f4, $f3
[all …]
/external/llvm/test/CodeGen/XCore/
Depilogue_prologue.ll138 ; CHECKFP-NEXT: bl f5
143 ; CHECKFP-NEXT: bl f5
185 ; CHECK-NEXT: bl f5
189 ; CHECK-NEXT: bl f5
198 declare void @f5(i32*)
203 call void @f5(i32* %1)
205 call void @f5(i32* %2)
217 ; CHECKFP-NEXT: bl f5
227 ; CHECK-NEXT: bl f5
233 call void @f5(i32* %1)
[all …]
/external/llvm/test/MC/SystemZ/
Dregs-good.s59 #CHECK: ler %f4, %f5 # encoding: [0x38,0x45]
68 ler %f4,%f5
77 #CHECK: ldr %f4, %f5 # encoding: [0x28,0x45]
86 ldr %f4,%f5
94 #CHECK: lxr %f4, %f5 # encoding: [0xb3,0x65,0x00,0x45]
99 lxr %f4,%f5
124 #CHECK: .cfi_offset %f5, 168
158 .cfi_offset %f5,168
/external/eigen/unsupported/test/
Dalignedvector3.cpp33 FastType f1(r1), f2(r2), f3(r3), f4(r4), f5(r5); in alignedvector3() local
43 VERIFY_IS_APPROX(f4-=f5,r4-=r5); in alignedvector3()
44 VERIFY_IS_APPROX(f4-=f5+f1,r4-=r5+r1); in alignedvector3()
45 VERIFY_IS_APPROX(f5+f1-s1*f2,r5+r1-s1*r2); in alignedvector3()
46 VERIFY_IS_APPROX(f5+f1/s2-s1*f2,r5+r1/s2-s1*r2); in alignedvector3()
/external/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt123 0x54 0xa4 0x18 0x30 # CHECK: add.s $f3, $f4, $f5
125 0x54 0xa4 0x18 0x70 # CHECK: sub.s $f3, $f4, $f5
127 0x54 0xa4 0x18 0xb0 # CHECK: mul.s $f3, $f4, $f5
129 0x54 0xa4 0x18 0xf0 # CHECK: div.s $f3, $f4, $f5
131 0x54 0xa4 0x19 0xb8 # CHECK: maddf.s $f3, $f4, $f5
132 0x54 0xa4 0x1b 0xb8 # CHECK: maddf.d $f3, $f4, $f5
133 0x54 0xa4 0x19 0xf8 # CHECK: msubf.s $f3, $f4, $f5
134 0x54 0xa4 0x1b 0xf8 # CHECK: msubf.d $f3, $f4, $f5
139 0x54 0x64 0x28 0x0b # CHECK: max.s $f5, $f4, $f3
140 0x54 0x64 0x2a 0x0b # CHECK: max.d $f5, $f4, $f3
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt127 0x54 0xa4 0x18 0x30 # CHECK: add.s $f3, $f4, $f5
129 0x54 0xa4 0x18 0x70 # CHECK: sub.s $f3, $f4, $f5
131 0x54 0xa4 0x18 0xb0 # CHECK: mul.s $f3, $f4, $f5
133 0x54 0xa4 0x18 0xf0 # CHECK: div.s $f3, $f4, $f5
135 0x54 0xa4 0x19 0xb8 # CHECK: maddf.s $f3, $f4, $f5
136 0x54 0xa4 0x1b 0xb8 # CHECK: maddf.d $f3, $f4, $f5
137 0x54 0xa4 0x19 0xf8 # CHECK: msubf.s $f3, $f4, $f5
138 0x54 0xa4 0x1b 0xf8 # CHECK: msubf.d $f3, $f4, $f5
143 0x54 0x64 0x28 0x0b # CHECK: max.s $f5, $f4, $f3
144 0x54 0x64 0x2a 0x0b # CHECK: max.d $f5, $f4, $f3
[all …]
/external/clang/test/CodeGenCXX/
Dvisibility-inlines-hidden.cpp11 static void f5() { } in f5() function
23 static void f5() { } in f5() function
47 X0::f5(); in use()
59 X1<int>::f5(); in use()
/external/deqp-deps/glslang/Test/
Dhlsl.inf.vert7 const float f5 = -1.#INF;
8 const float f6 = f5 * 0.0f;
10 return (float4)(f1 + f2 + f3 + f4 + f5 + f6);
/external/clang/test/CodeGen/
Dmicrosoft-call-conv-x64.c10 void __stdcall f5(void) { in f5() function
20 void (__stdcall *pf5)(void) = f5;
23 f4(); f5(); in main()
Dinline2.c26 extern inline int f5(void);
27 inline int f5(void) { return 0; } in f5() function
65 return f0() + f1() + f2() + f3() + f4() + f5() + f6() + f7() + f8() + f9() in test_all()
Dmicrosoft-call-conv.c13 void __stdcall f5(void) { in f5() function
34 void (__stdcall *pf5)(void) = f5;
39 f4(); f5(); f6(); f61(); in main()
/external/clang/test/SemaTemplate/
Ddependent-type-identity.cpp52 void f5(typename T::template apply<U>::type*); // expected-note{{previous}}
53 void f5(typename U::template apply<U>::type*);
54 void f5(typename U::template apply<T>::type*);
55 void f5(typename type::template apply<T>::type*);
56 void f5(typename type::template apply<U_type>::type*); // expected-error{{redeclar}}
/external/compiler-rt/test/profile/
Dinstrprof-visibility-kinds.inc15 void f5() __attribute__((visibility("default")));
16 void f5() {}
33 f5();
/external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/Generic/
Dlinkage-name-abstract.ll23 ; __attribute__((always_inline)) void f5();
25 ; void F4::f5() {
29 ; F4::f5();
53 ; For F4::f5(), first we see the in-class declaration,
59 ; REF-NEXT: DW_AT_name {{.*}} "f5"
123 !15 = distinct !DISubprogram(name: "f5", linkageName: "_ZN2F42f5Ev", scope: !16, file: !1, line: 12…
126 !18 = !DISubprogram(name: "f5", linkageName: "_ZN2F42f5Ev", scope: !16, file: !1, line: 10, type: !…
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SPARC/
D64abi.ll131 define void @call_floatarg(float %f1, double %d2, float %f5, double *%p) {
132 %r = call double @floatarg(float %f5, double %d2, double %d2, double %d2,
133 float %f5, float %f5, float %f5, float %f5,
134 float %f5, float %f5, float %f5, float %f5,
135 float %f5, float %f5, float %f5, float %f5,
219 ; HARD-DAG: fmovs %f5, %f1
224 define void @call_inreg_fi(i32* %p, i32 %i1, float %f5) {
225 %x = call i32 @inreg_fi(i32 %i1, float %f5)
242 ; HARD-DAG: fmovs %f5, %f1
247 define void @call_inreg_ff(i32* %p, float %f3, float %f5) {
[all …]

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