/external/llvm/test/CodeGen/AArch64/ |
D | fp-dp3.ll | 42 ; CHECK: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}} 43 ; CHECK-NOFAST: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}} 82 ; CHECK: fnmsub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 83 ; CHECK-NOFAST: fnmsub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 131 ; CHECK: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}} 132 ; CHECK-NOFAST-NOT: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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D | arm64-fmadd.ll | 41 ; CHECK: fnmsub s0, s0, s1, s2 84 ; CHECK: fnmsub d0, d0, d1, d2
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | fp-dp3.ll | 42 ; CHECK: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}} 43 ; CHECK-NOFAST: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}} 82 ; CHECK: fnmsub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 83 ; CHECK-NOFAST: fnmsub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 131 ; CHECK: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}} 132 ; CHECK-NOFAST-NOT: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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D | arm64-fmadd.ll | 41 ; CHECK: fnmsub s0, s0, s1, s2 84 ; CHECK: fnmsub d0, d0, d1, d2
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/external/capstone/suite/MC/PowerPC/ |
D | ppc64-encoding-fp.s.cs | 71 0xfc,0x43,0x29,0x3c = fnmsub 2, 3, 4, 5 72 0xfc,0x43,0x29,0x3d = fnmsub. 2, 3, 4, 5
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/external/llvm/test/CodeGen/PowerPC/ |
D | fma-assoc.ll | 69 ; CHECK: fnmsub 70 ; CHECK-NEXT: fnmsub 206 ; CHECK: fnmsub 207 ; CHECK-NEXT: fnmsub 226 ; CHECK: fnmsub 227 ; CHECK-NEXT: fnmsub
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D | recipest.ll | 18 ; CHECK-DAG: fnmsub 70 ; CHECK-DAG: fnmsub 161 ; CHECK-DAG: fnmsub 163 ; CHECK-NEXT: fnmsub 208 ; CHECK-DAG: fnmsub
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D | fma.ll | 98 ; CHECK: fnmsub 111 ; CHECK: fnmsub
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
D | recipest.ll | 18 ; CHECK-DAG: fnmsub 77 ; CHECK-DAG: fnmsub 175 ; CHECK-DAG: fnmsub 177 ; CHECK-NEXT: fnmsub 222 ; CHECK-DAG: fnmsub
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D | fma-assoc.ll | 113 ; CHECK-UNSAFE: fnmsub 114 ; CHECK-UNSAFE-NEXT: fnmsub 256 ; CHECK: fnmsub 257 ; CHECK-NEXT: fnmsub 276 ; CHECK: fnmsub 277 ; CHECK-NEXT: fnmsub
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D | fma.ll | 98 ; CHECK: fnmsub 111 ; CHECK: fnmsub
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D | fma-ext.ll | 52 ; CHECK: fnmsub
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/external/llvm/test/MC/PowerPC/ |
D | ppc64-encoding-fp.s | 230 # CHECK-BE: fnmsub 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x3c] 231 # CHECK-LE: fnmsub 2, 3, 4, 5 # encoding: [0x3c,0x29,0x43,0xfc] 232 fnmsub 2, 3, 4, 5 233 # CHECK-BE: fnmsub. 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x3d] 234 # CHECK-LE: fnmsub. 2, 3, 4, 5 # encoding: [0x3d,0x29,0x43,0xfc] 235 fnmsub. 2, 3, 4, 5
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
D | ppc64-encoding-fp.s | 236 # CHECK-BE: fnmsub 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x3c] 237 # CHECK-LE: fnmsub 2, 3, 4, 5 # encoding: [0x3c,0x29,0x43,0xfc] 238 fnmsub 2, 3, 4, 5 239 # CHECK-BE: fnmsub. 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x3d] 240 # CHECK-LE: fnmsub. 2, 3, 4, 5 # encoding: [0x3d,0x29,0x43,0xfc] 241 fnmsub. 2, 3, 4, 5
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/RISCV/ |
D | rv32d-valid.s | 55 # CHECK-INST: fnmsub.d fs2, fs3, fs4, fs5, dyn 57 fnmsub.d f18, f19, f20, f21, dyn 130 # CHECK-INST: fnmsub.d fs2, fs3, fs4, fs5, rdn 132 fnmsub.d f18, f19, f20, f21, rdn
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D | rvd-aliases-valid.s | 56 # CHECK-INST: fnmsub.d fs2, fs3, fs4, fs5, dyn 57 # CHECK-ALIAS: fnmsub.d fs2, fs3, fs4, fs5{{[[:space:]]}} 58 fnmsub.d f18, f19, f20, f21
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D | rv32f-valid.s | 50 # CHECK-INST: fnmsub.s fs2, fs3, fs4, fs5, dyn 52 fnmsub.s f18, f19, f20, f21, dyn 126 # CHECK-INST: fnmsub.s fs2, fs3, fs4, fs5, rdn 128 fnmsub.s f18, f19, f20, f21, rdn
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D | rvf-aliases-valid.s | 107 # CHECK-INST: fnmsub.s fs2, fs3, fs4, fs5, dyn 108 # CHECK-ALIAS: fnmsub.s fs2, fs3, fs4, fs5{{[[:space:]]}} 109 fnmsub.s f18, f19, f20, f21
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D | rv32f-invalid.s | 29 fnmsub.s f18, f19, f20, f21, 0b111 # CHECK: :[[@LINE]]:30: error: operand must be a valid floating …
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | arm64-fp-encoding.s | 126 fnmsub h1, h2, h3, h4 127 fnmsub s1, s2, s3, s4 128 fnmsub d1, d2, d3, d4 define 130 ; FP16: fnmsub h1, h2, h3, h4 ; encoding: [0x41,0x90,0xe3,0x1f] 132 ; NO-FP16-NEXT: fnmsub h1, h2, h3, h4 133 ; CHECK: fnmsub s1, s2, s3, s4 ; encoding: [0x41,0x90,0x23,0x1f] 134 ; CHECK: fnmsub d1, d2, d3, d4 ; encoding: [0x41,0x90,0x63,0x1f]
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/external/llvm/test/MC/AArch64/ |
D | arm64-fp-encoding.s | 126 fnmsub h1, h2, h3, h4 127 fnmsub s1, s2, s3, s4 128 fnmsub d1, d2, d3, d4 define 130 ; FP16: fnmsub h1, h2, h3, h4 ; encoding: [0x41,0x90,0xe3,0x1f] 132 ; NO-FP16-NEXT: fnmsub h1, h2, h3, h4 133 ; CHECK: fnmsub s1, s2, s3, s4 ; encoding: [0x41,0x90,0x23,0x1f] 134 ; CHECK: fnmsub d1, d2, d3, d4 ; encoding: [0x41,0x90,0x63,0x1f]
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-scalar-fp.txt | 104 # FP16: fnmsub h1, h2, h3, h4 105 # CHECK: fnmsub s1, s2, s3, s4 106 # CHECK: fnmsub d1, d2, d3, d4
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-scalar-fp.txt | 104 # FP16: fnmsub h1, h2, h3, h4 105 # CHECK: fnmsub s1, s2, s3, s4 106 # CHECK: fnmsub d1, d2, d3, d4
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/external/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-fp.txt | 210 # CHECK: fnmsub 2, 3, 4, 5 213 # CHECK: fnmsub. 2, 3, 4, 5
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-fp.txt | 210 # CHECK: fnmsub 2, 3, 4, 5 213 # CHECK: fnmsub. 2, 3, 4, 5
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