| /external/mesa3d/src/intel/blorp/ |
| D | blorp_nir_builder.h | 29 nir_variable *frag_coord = in blorp_nir_frag_coord() local
33 frag_coord->data.location = VARYING_SLOT_POS; in blorp_nir_frag_coord()
34 frag_coord->data.origin_upper_left = true; in blorp_nir_frag_coord()
36 return nir_load_var(b, frag_coord); in blorp_nir_frag_coord()
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| D | blorp_blit.c | 61 nir_variable *frag_coord; member
87 v->frag_coord = nir_variable_create(b->shader, nir_var_shader_in, in brw_blorp_blit_vars_init()
89 v->frag_coord->data.location = VARYING_SLOT_POS; in brw_blorp_blit_vars_init()
90 v->frag_coord->data.origin_upper_left = true; in brw_blorp_blit_vars_init()
102 nir_ssa_def *coord = nir_f2i32(b, nir_load_var(b, v->frag_coord)); in blorp_blit_get_frag_coords()
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| /external/mesa3d/src/intel/vulkan/ |
| D | anv_nir_lower_input_attachments.c | 60 nir_ssa_def *frag_coord = nir_f2i32(&b, load_frag_coord(&b)); in try_lower_input_load() local
62 nir_ssa_def *pos = nir_iadd(&b, frag_coord, offset); in try_lower_input_load()
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| /external/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| D | fd5_program.c | 364 coord_regid = s[FS].v->frag_coord ? regid(0,0) : regid(63,0); in fd5_program_emit()
365 zwcoord_regid = s[FS].v->frag_coord ? regid(0,2) : regid(63,0); in fd5_program_emit()
540 COND(s[FS].v->frag_coord, A5XX_VPC_CNTL_0_VARYING) | in fd5_program_emit()
569 COND(s[FS].v->frag_coord, A5XX_SP_FS_CTRL_REG0_VARYING) | in fd5_program_emit()
588 COND(s[FS].v->frag_coord, A5XX_GRAS_CNTL_XCOORD | in fd5_program_emit()
597 COND(s[FS].v->frag_coord, A5XX_RB_RENDER_CONTROL0_XCOORD | in fd5_program_emit()
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| D | fd5_emit.c | 566 COND(fragz && fp->frag_coord, A5XX_RB_DEPTH_PLANE_CNTL_UNK1)); in fd5_emit_state()
570 COND(fragz && fp->frag_coord, A5XX_GRAS_SU_DEPTH_PLANE_CNTL_UNK1)); in fd5_emit_state()
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| /external/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
| D | fd4_program.c | 258 coord_regid = s[FS].v->frag_coord ? regid(0,0) : regid(63,0); in fd4_program_emit()
259 zwcoord_regid = s[FS].v->frag_coord ? regid(0,2) : regid(63,0); in fd4_program_emit()
412 COND(s[FS].v->frag_coord, A4XX_SP_FS_CTRL_REG1_FRAGCOORD)); in fd4_program_emit()
436 COND(s[FS].v->frag_coord, A4XX_RB_RENDER_CONTROL2_XCOORD | in fd4_program_emit()
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| D | fd4_emit.c | 563 COND(fragz && fp->frag_coord, A4XX_RB_DEPTH_CONTROL_FORCE_FRAGZ_TO_FS)); in fd4_emit_state()
571 COND(fragz && fp->frag_coord, A4XX_GRAS_ALPHA_CONTROL_FORCE_FRAGZ_TO_FS)); in fd4_emit_state()
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| /external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
| D | ir3_compiler_nir.c | 69 struct ir3_instruction *frag_pos, *frag_face, *frag_coord[4]; member
701 compile_assert(ctx, !ctx->frag_coord[comp]); in create_frag_coord()
703 ctx->frag_coord[comp] = create_input(ctx->block, 0); in create_frag_coord()
717 instr = ir3_SUB_S(block, ctx->frag_coord[comp], 0, in create_frag_coord()
728 return ctx->frag_coord[comp]; in create_frag_coord()
2927 so->frag_coord = true; in setup_input()
3161 n += COND(so->frag_coord, 4); in fixup_frag_inputs()
3185 if (so->frag_coord) { in fixup_frag_inputs()
3186 ctx->frag_coord[0]->regs[0]->num = regid++; in fixup_frag_inputs()
3187 ctx->frag_coord[1]->regs[0]->num = regid++; in fixup_frag_inputs()
[all …]
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| D | ir3_shader.h | 250 bool frag_coord, frag_face, color0_mrt; member
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| D | ir3_shader.c | 98 if (v->frag_coord) in fixup_regfootprint()
513 if (so->frag_coord) in ir3_shader_disasm()
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| D | ir3.h | 1002 bool frag_coord, bool frag_face);
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| D | ir3_ra.c | 1169 bool frag_coord, bool frag_face) in ir3_ra() argument
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| /external/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
| D | fd3_emit.c | 510 val |= COND(fp->frag_coord, A3XX_RB_RENDER_CONTROL_XCOORD | in fd3_emit_state()
579 val |= COND(fp->frag_coord, A3XX_GRAS_CL_CLIP_CNTL_ZCOORD | in fd3_emit_state()
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| D | fd3_program.c | 242 COND(fp->frag_coord, A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDXYREGID(regid(0,0)) | in fd3_program_emit()
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| /external/mesa3d/src/compiler/nir/ |
| D | nir_intrinsics.h | 332 SYSTEM_VALUE(frag_coord, 4, 0, xx, xx, xx)
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