/external/capstone/suite/MC/PowerPC/ |
D | ppc64-encoding-fp.s.cs | 75 0xfc,0x40,0x18,0x18 = frsp 2, 3 76 0xfc,0x40,0x18,0x19 = frsp. 2, 3
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/external/llvm/test/MC/PowerPC/ |
D | ppc64-encoding-fp.s | 245 # CHECK-BE: frsp 2, 3 # encoding: [0xfc,0x40,0x18,0x18] 246 # CHECK-LE: frsp 2, 3 # encoding: [0x18,0x18,0x40,0xfc] 247 frsp 2, 3 248 # CHECK-BE: frsp. 2, 3 # encoding: [0xfc,0x40,0x18,0x19] 249 # CHECK-LE: frsp. 2, 3 # encoding: [0x19,0x18,0x40,0xfc] 250 frsp. 2, 3
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
D | ppc64-encoding-fp.s | 251 # CHECK-BE: frsp 2, 3 # encoding: [0xfc,0x40,0x18,0x18] 252 # CHECK-LE: frsp 2, 3 # encoding: [0x18,0x18,0x40,0xfc] 253 frsp 2, 3 254 # CHECK-BE: frsp. 2, 3 # encoding: [0xfc,0x40,0x18,0x19] 255 # CHECK-LE: frsp. 2, 3 # encoding: [0x19,0x18,0x40,0xfc] 256 frsp. 2, 3
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
D | fast-isel-conversion.ll | 27 ; PPC970: frsp 45 ; PPC970: frsp 65 ; PPC970: frsp 86 ; PPC970: frsp 218 ; PPC970: frsp 239 ; PPC970: frsp
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D | i32-to-float.ll | 18 ; CHECK: frsp 1, [[REG3]] 25 ; CHECK-PWR6: frsp 1, [[REG2]]
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D | fp-to-int-to-fp.ll | 20 ; PPC64: frsp 1, [[REG2]]
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D | recipest.ll | 84 ; CHECK-NEXT: frsp
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D | build-vector-tests.ll | 3 ; RUN: -check-prefix=P9BE -implicit-check-not frsp 6 ; RUN: -check-prefix=P9LE -implicit-check-not frsp 9 ; RUN: -check-prefix=P8BE -implicit-check-not frsp 12 ; RUN: -check-prefix=P8LE -implicit-check-not frsp
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/external/llvm/test/CodeGen/PowerPC/ |
D | fast-isel-conversion.ll | 30 ; PPC970: frsp 55 ; PPC970: frsp 79 ; PPC970: frsp 103 ; PPC970: frsp 260 ; PPC970: frsp 284 ; PPC970: frsp
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D | i32-to-float.ll | 18 ; CHECK: frsp 1, [[REG3]] 25 ; CHECK-PWR6: frsp 1, [[REG2]]
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D | fp-to-int-to-fp.ll | 21 ; PPC64: frsp 1, [[REG2]]
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D | recipest.ll | 77 ; CHECK-NEXT: frsp
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/external/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-fp.txt | 222 # CHECK: frsp 2, 3 225 # CHECK: frsp. 2, 3
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-fp.txt | 222 # CHECK: frsp 2, 3 225 # CHECK: frsp. 2, 3
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCSchedule.td | 195 // frsp FPGeneral
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D | README.txt | 516 frsp f1, f0
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D | PPCInstrInfo.td | 993 "frsp $frD, $frB", FPGeneral,
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/external/v8/src/compiler/ppc/ |
D | code-generator-ppc.cc | 293 __ frsp(i.OutputDoubleRegister(), i.OutputDoubleRegister()); \ 302 __ frsp(i.OutputDoubleRegister(), i.OutputDoubleRegister()); \ 1870 ASSEMBLE_FLOAT_UNOP_RC(frsp, 0); in AssembleArchInstruction()
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/external/v8/src/ppc/ |
D | assembler-ppc.h | 1223 void frsp(const DoubleRegister frt, const DoubleRegister frb,
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D | constants-ppc.h | 1517 V(frsp, FRSP, 0xFC000018) \
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D | assembler-ppc.cc | 1827 void Assembler::frsp(const DoubleRegister frt, const DoubleRegister frb, in frsp() function in v8::internal::Assembler
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.td | 2112 "frsp", "$frD, $frB", IIC_FPGeneral,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.td | 2346 "frsp", "$frD, $frB", IIC_FPGeneral,
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