/external/llvm/test/CodeGen/PowerPC/ |
D | fsel.ll | 14 ; CHECK-NOT: fsel 18 ; CHECK-FM: fsel 1, 1, 2, 3 22 ; CHECK-FM-VSX: fsel 1, 1, 2, 3 33 ; CHECK-NOT: fsel 38 ; CHECK-FM: fsel 1, [[REG]], 3, 2 43 ; CHECK-FM-VSX: fsel 1, [[REG]], 3, 2 54 ; CHECK-NOT: fsel 58 ; CHECK-FM: fsel [[REG:[0-9]+]], 1, 2, 3 60 ; CHECK-FM: fsel 1, [[REG2]], [[REG]], 3 65 ; CHECK-FM-VSX: fsel [[REG:[0-9]+]], 1, 2, 3 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
D | fsel.ll | 14 ; CHECK-NOT: fsel 18 ; CHECK-FM: fsel 1, 1, 2, 3 22 ; CHECK-FM-VSX: fsel 1, 1, 2, 3 33 ; CHECK-NOT: fsel 38 ; CHECK-FM: fsel 1, [[REG]], 3, 2 43 ; CHECK-FM-VSX: fsel 1, [[REG]], 3, 2 54 ; CHECK-NOT: fsel 58 ; CHECK-FM: fsel [[REG:[0-9]+]], 1, 2, 3 60 ; CHECK-FM: fsel 1, [[REG2]], [[REG]], 3 65 ; CHECK-FM-VSX: fsel [[REG:[0-9]+]], 1, 2, 3 [all …]
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D | change-no-infs.ll | 12 ; The fcmp+select in these functions should be converted to a fsel instruction 18 ; SAFE-NOT: fsel 19 ; UNSAFE: fsel 28 ; SAFE-NOT: fsel 29 ; UNSAFE-NOT: fsel 37 ; SAFE-NOT: fsel 38 ; UNSAFE: fsel 47 ; SAFE-NOT: fsel 48 ; UNSAFE-NOT: fsel 56 ; SAFE-NOT: fsel [all …]
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/external/u-boot/arch/arm/mach-omap2/omap3/ |
D | clock.c | 186 0x000000F0, ptr->fsel << 4); in dpll3_init_34xx() 203 clrsetbits_le32(&p0, 0x000000F0, ptr->fsel << 4); in dpll3_init_34xx() 277 clrsetbits_le32(&prcm_base->clken_pll, 0x00F00000, ptr->fsel << 20); in dpll4_init_34xx() 302 clrsetbits_le32(&prcm_base->clken_pll, 0x000000F0, ptr->fsel << 4); in dpll5_init_34xx() 332 0x000000F0, ptr->fsel << 4); in mpu_init_34xx() 363 0x000000F0, ptr->fsel << 4); in iva_init_34xx() 436 0x000000F0, ptr->fsel << 4); in dpll3_init_36xx() 453 clrsetbits_le32(&p0, 0x000000F0, ptr->fsel << 4); in dpll3_init_36xx()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
D | vselect-zero.ll | 44 define float @fsel(float %a, float %b, float %x) { 45 ; SSE-LABEL: fsel: 51 ; AVX-LABEL: fsel:
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/external/capstone/suite/MC/PowerPC/ |
D | ppc64-encoding-fp.s.cs | 106 0xfc,0x43,0x29,0x2e = fsel 2, 3, 4, 5 107 0xfc,0x43,0x29,0x2f = fsel. 2, 3, 4, 5
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/external/llvm/test/MC/PowerPC/ |
D | ppc64-encoding-fp.s | 350 # CHECK-BE: fsel 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x2e] 351 # CHECK-LE: fsel 2, 3, 4, 5 # encoding: [0x2e,0x29,0x43,0xfc] 352 fsel 2, 3, 4, 5 353 # CHECK-BE: fsel. 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x2f] 354 # CHECK-LE: fsel. 2, 3, 4, 5 # encoding: [0x2f,0x29,0x43,0xfc] 355 fsel. 2, 3, 4, 5
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
D | ppc64-encoding-fp.s | 370 # CHECK-BE: fsel 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x2e] 371 # CHECK-LE: fsel 2, 3, 4, 5 # encoding: [0x2e,0x29,0x43,0xfc] 372 fsel 2, 3, 4, 5 373 # CHECK-BE: fsel. 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x2f] 374 # CHECK-LE: fsel. 2, 3, 4, 5 # encoding: [0x2f,0x29,0x43,0xfc] 375 fsel. 2, 3, 4, 5
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/external/u-boot/arch/arm/include/asm/arch-omap3/ |
D | clock.h | 34 unsigned int fsel; member
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/external/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-fp.txt | 315 # CHECK: fsel 2, 3, 4, 5 318 # CHECK: fsel. 2, 3, 4, 5
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-fp.txt | 333 # CHECK: fsel 2, 3, 4, 5 336 # CHECK: fsel. 2, 3, 4, 5
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCSchedule.td | 197 // fsel FPGeneral
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D | PPCInstrInfo.td | 84 // Type constraint for fsel. 1280 "fsel $FRT, $FRA, $FRC, $FRB", FPGeneral, 1284 "fsel $FRT, $FRA, $FRC, $FRB", FPGeneral,
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D | README.txt | 192 fsel f1, f0, f2, f3
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | README.txt | 105 fsel f1, f0, f2, f3
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D | PPCInstrInfo.td | 162 // Type constraint for fsel. 2858 "fsel", "$FRT, $FRA, $FRC, $FRB", IIC_FPGeneral, 2862 "fsel", "$FRT, $FRA, $FRC, $FRB", IIC_FPGeneral,
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/external/llvm/lib/Target/PowerPC/ |
D | README.txt | 105 fsel f1, f0, f2, f3
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D | PPCInstrInfo.td | 121 // Type constraint for fsel. 2578 "fsel", "$FRT, $FRA, $FRC, $FRB", IIC_FPGeneral, 2582 "fsel", "$FRT, $FRA, $FRC, $FRB", IIC_FPGeneral,
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/external/v8/src/ppc/ |
D | assembler-ppc.h | 1241 void fsel(const DoubleRegister frt, const DoubleRegister fra,
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D | constants-ppc.h | 1870 V(fsel, FSEL, 0xFC00002E) \
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D | assembler-ppc.cc | 1881 void Assembler::fsel(const DoubleRegister frt, const DoubleRegister fra, in fsel() function in v8::internal::Assembler
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