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/external/tensorflow/tensorflow/core/kernels/
Dunary_ops_composition.cc159 #define REGISTER_COMPUTE_FN_HELPER(name, functor) \ argument
160 static_assert(std::is_same<functor::in_type, functor::out_type>::value, \
164 *out = in.unaryExpr(functor::func()); \
167 return Eigen::internal::functor_traits<functor::func>::Cost; \
176 auto relu = functor::Relu<Eigen::DefaultDevice, T>(); \
185 auto relu6 = functor::Relu6<Eigen::DefaultDevice, T>(); \
194 auto elu = functor::Elu<Eigen::DefaultDevice, T>(); \
203 auto selu = functor::Selu<Eigen::DefaultDevice, T>(); \
260 REGISTER_COMPUTE_FN_HELPER(Abs, functor::abs<T>);
261 REGISTER_COMPUTE_FN_HELPER(Acos, functor::acos<T>);
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Dstrided_slice_op_gpu_impl.h34 template struct functor::StridedSlice<GPUDevice, T, 1>; \
35 template struct functor::StridedSlice<GPUDevice, T, 2>; \
36 template struct functor::StridedSlice<GPUDevice, T, 3>; \
37 template struct functor::StridedSlice<GPUDevice, T, 4>; \
38 template struct functor::StridedSlice<GPUDevice, T, 5>; \
39 template struct functor::StridedSlice<GPUDevice, T, 6>; \
40 template struct functor::StridedSlice<GPUDevice, T, 7>; \
41 template struct functor::StridedSliceGrad<GPUDevice, T, 1>; \
42 template struct functor::StridedSliceGrad<GPUDevice, T, 2>; \
43 template struct functor::StridedSliceGrad<GPUDevice, T, 3>; \
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Dmirror_pad_op_gpu.cu.cc29 template struct functor::MirrorPad<GpuDevice, T, int32, 1>; \
30 template struct functor::MirrorPad<GpuDevice, T, int32, 2>; \
31 template struct functor::MirrorPad<GpuDevice, T, int32, 3>; \
32 template struct functor::MirrorPad<GpuDevice, T, int32, 4>; \
33 template struct functor::MirrorPad<GpuDevice, T, int32, 5>; \
34 template struct functor::MirrorPad<GpuDevice, T, int64, 1>; \
35 template struct functor::MirrorPad<GpuDevice, T, int64, 2>; \
36 template struct functor::MirrorPad<GpuDevice, T, int64, 3>; \
37 template struct functor::MirrorPad<GpuDevice, T, int64, 4>; \
38 template struct functor::MirrorPad<GpuDevice, T, int64, 5>; \
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Dcwise_op_div.cc19 REGISTER6(BinaryOp, CPU, "Div", functor::div, float, Eigen::half, double,
21 REGISTER5(BinaryOp, CPU, "Div", functor::safe_div, uint8, uint16, int16, int32,
23 REGISTER5(BinaryOp, CPU, "TruncateDiv", functor::safe_div, uint8, uint16, int16,
25 REGISTER6(BinaryOp, CPU, "RealDiv", functor::div, float, Eigen::half, double,
27 REGISTER5(BinaryOp, CPU, "DivNoNan", functor::div_no_nan, Eigen::half, float,
31 REGISTER9(BinaryOp, GPU, "Div", functor::div, float, Eigen::half, double, uint8,
33 REGISTER4(BinaryOp, GPU, "TruncateDiv", functor::div, uint8, uint16, int16,
35 REGISTER5(BinaryOp, GPU, "RealDiv", functor::div, float, Eigen::half, double,
37 REGISTER2(BinaryOp, GPU, "DivNoNan", functor::div_no_nan, float, double);
48 BinaryOp<CPUDevice, functor::safe_div<int32>>);
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Drelu_op.h39 functor::Relu<Device, T> functor; in Operate() local
40 functor(context->eigen_device<Device>(), input.flat<T>(), in Operate()
87 functor::ReluGrad<Device, T> functor; in OperateNoTemplate() local
88 functor(context->eigen_device<Device>(), g.flat<T>(), a.flat<T>(), in OperateNoTemplate()
98 functor::Relu6<Device, T> functor; in Operate() local
99 functor(context->eigen_device<Device>(), input.flat<T>(), in Operate()
129 functor::Relu6Grad<Device, T> functor; in OperateNoTemplate() local
130 functor(context->eigen_device<Device>(), g.flat<T>(), a.flat<T>(), in OperateNoTemplate()
145 functor::LeakyRelu<Device, T> functor; in Operate() local
146 functor(context->eigen_device<Device>(), input.flat<T>(), alpha_, in Operate()
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Dadjust_contrast_op_gpu.cu.cc29 template struct functor::AdjustContrastv2<GPUDevice, float>;
30 template struct functor::AdjustContrastv2<GPUDevice, Eigen::half>;
33 template struct functor::AdjustContrast<GPUDevice, uint8>;
34 template struct functor::AdjustContrast<GPUDevice, int8>;
35 template struct functor::AdjustContrast<GPUDevice, int16>;
36 template struct functor::AdjustContrast<GPUDevice, int32>;
37 template struct functor::AdjustContrast<GPUDevice, int64>;
38 template struct functor::AdjustContrast<GPUDevice, float>;
39 template struct functor::AdjustContrast<GPUDevice, double>;
Dcwise_op_reciprocal.cc19 REGISTER5(UnaryOp, CPU, "Inv", functor::inverse, float, Eigen::half, double,
22 REGISTER4(UnaryOp, GPU, "Inv", functor::inverse, float, Eigen::half, double,
26 REGISTER5(SimpleBinaryOp, CPU, "InvGrad", functor::inverse_grad, float,
29 REGISTER3(SimpleBinaryOp, GPU, "InvGrad", functor::inverse_grad, float,
33 REGISTER5(UnaryOp, CPU, "Reciprocal", functor::inverse, float, Eigen::half,
36 REGISTER4(UnaryOp, GPU, "Reciprocal", functor::inverse, float, Eigen::half,
40 REGISTER(UnaryOp, SYCL, "Reciprocal", functor::inverse, float);
43 REGISTER5(SimpleBinaryOp, CPU, "ReciprocalGrad", functor::inverse_grad, float,
46 REGISTER3(SimpleBinaryOp, GPU, "ReciprocalGrad", functor::inverse_grad, float,
50 REGISTER(SimpleBinaryOp, SYCL, "ReciprocalGrad", functor::inverse_grad, float);
Dcwise_op_add_1.cc19 REGISTER6(BinaryOp, CPU, "Add", functor::add, float, Eigen::half, double, int32,
21 REGISTER6(BinaryOp, CPU, "AddV2", functor::add, float, Eigen::half, double,
25 REGISTER3(BinaryOp, GPU, "Add", functor::add, float, Eigen::half, double);
26 REGISTER3(BinaryOp, GPU, "AddV2", functor::add, float, Eigen::half, double);
37 BinaryOp<CPUDevice, functor::add<int32>>);
44 BinaryOp<CPUDevice, functor::add<int32>>);
49 REGISTER(BinaryOp, SYCL, "Add", functor::add, type); \
50 REEGISTER(BinaryOp, SYCL, "AddV2", functor::add, type);
60 BinaryOp<CPUDevice, functor::add<int32>>);
67 BinaryOp<CPUDevice, functor::add<int32>>);
Dtraining_ops_gpu.cu.cc27 namespace functor { namespace
343 template struct functor::ApplyGradientDescent<GPUDevice, Eigen::half>;
344 template struct functor::ApplyGradientDescent<GPUDevice, float>;
345 template struct functor::ApplyGradientDescent<GPUDevice, double>;
347 template struct functor::ApplyAdagrad<GPUDevice, Eigen::half>;
348 template struct functor::ApplyAdagrad<GPUDevice, float>;
349 template struct functor::ApplyAdagrad<GPUDevice, double>;
351 template struct functor::ApplyAdadelta<GPUDevice, Eigen::half>;
352 template struct functor::ApplyAdadelta<GPUDevice, float>;
353 template struct functor::ApplyAdadelta<GPUDevice, double>;
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Dcwise_op_mul_1.cc20 REGISTER6(BinaryOp, CPU, "Mul", functor::mul, float, Eigen::half, double, uint8,
22 REGISTER5(BinaryOp, CPU, "MulNoNan", functor::mul_no_nan, Eigen::half, float,
29 REGISTER(BinaryOp, CPU, "Mul", functor::mul, int32);
33 REGISTER4(BinaryOp, GPU, "Mul", functor::mul, float, Eigen::half, double,
44 BinaryOp<CPUDevice, functor::mul<int32>>);
45 REGISTER2(BinaryOp, GPU, "MulNoNan", functor::mul_no_nan, float, double);
49 REGISTER3(BinaryOp, SYCL, "Mul", functor::mul, float, double, uint8);
56 BinaryOp<CPUDevice, functor::mul<int32>>);
Drelu_op_gpu.cu.cc33 namespace functor { namespace
149 template struct functor::Relu<GPUDevice, T>; \
150 template struct functor::ReluGrad<GPUDevice, T>; \
151 template struct functor::Relu6<GPUDevice, T>; \
152 template struct functor::Relu6Grad<GPUDevice, T>; \
153 template struct functor::LeakyRelu<GPUDevice, T>; \
154 template struct functor::LeakyReluGrad<GPUDevice, T>; \
155 template struct functor::Elu<GPUDevice, T>; \
156 template struct functor::EluGrad<GPUDevice, T>; \
157 template struct functor::Selu<GPUDevice, T>; \
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Dslice_op_gpu.cu.cc31 template struct functor::Slice<GPUDevice, T, 1>; \
32 template struct functor::Slice<GPUDevice, T, 2>; \
33 template struct functor::Slice<GPUDevice, T, 3>; \
34 template struct functor::Slice<GPUDevice, T, 4>; \
35 template struct functor::Slice<GPUDevice, T, 5>; \
36 template struct functor::Slice<GPUDevice, T, 6>; \
37 template struct functor::Slice<GPUDevice, T, 7>;
Dpad_op_gpu.cu.cc30 template struct functor::Pad<GPUDevice, T, Tpadding, 0>; \
31 template struct functor::Pad<GPUDevice, T, Tpadding, 1>; \
32 template struct functor::Pad<GPUDevice, T, Tpadding, 2>; \
33 template struct functor::Pad<GPUDevice, T, Tpadding, 3>; \
34 template struct functor::Pad<GPUDevice, T, Tpadding, 4>; \
35 template struct functor::Pad<GPUDevice, T, Tpadding, 5>; \
36 template struct functor::Pad<GPUDevice, T, Tpadding, 6>;
Dcwise_op_abs.cc19 REGISTER5(UnaryOp, CPU, "Abs", functor::abs, float, Eigen::half, double, int32,
21 REGISTER2(UnaryOp, CPU, "ComplexAbs", functor::abs, complex64, complex128);
24 REGISTER4(UnaryOp, GPU, "Abs", functor::abs, float, Eigen::half, double, int64);
25 REGISTER2(UnaryOp, GPU, "ComplexAbs", functor::abs, complex64, complex128);
35 UnaryOp<CPUDevice, functor::abs<int32>>);
39 REGISTER3(UnaryOp, SYCL, "Abs", functor::abs, float, double, int64);
45 UnaryOp<CPUDevice, functor::abs<int32>>);
Dcwise_op_sub.cc19 REGISTER8(BinaryOp, CPU, "Sub", functor::sub, float, Eigen::half, double, int32,
23 REGISTER4(BinaryOp, CPU, "Sub", functor::sub, int8, uint8, int16, uint16);
28 REGISTER(BinaryOp, CPU, "Sub", functor::sub, int32);
32 REGISTER6(BinaryOp, GPU, "Sub", functor::sub, float, Eigen::half, double, int64,
44 BinaryOp<CPUDevice, functor::sub<int32>>);
48 REGISTER3(BinaryOp, SYCL, "Sub", functor::sub, float, double, int64);
55 BinaryOp<CPUDevice, functor::sub<int32>>);
Dcwise_op_igammas.cc20 REGISTER2(BinaryOp, CPU, "Igamma", functor::igamma, float, double);
21 REGISTER2(BinaryOp, CPU, "IgammaGradA", functor::igamma_grad_a, float, double);
22 REGISTER2(BinaryOp, CPU, "Igammac", functor::igammac, float, double);
24 REGISTER2(BinaryOp, GPU, "Igamma", functor::igamma, float, double);
25 REGISTER2(BinaryOp, GPU, "IgammaGradA", functor::igamma_grad_a, float, double);
26 REGISTER2(BinaryOp, GPU, "Igammac", functor::igammac, float, double);
Dconv_ops_gpu_2.cu.cc28 template struct functor::InflatePadAndShuffle<GPUDevice, double, 4, int>;
29 template struct functor::InflatePadAndShuffle<GPUDevice, double, 4,
31 template struct functor::InflatePadAndShuffle<GPUDevice, float, 4, int>;
32 template struct functor::InflatePadAndShuffle<GPUDevice, float, 4,
34 template struct functor::InflatePadAndShuffle<GPUDevice, Eigen::half, 4, int>;
35 template struct functor::InflatePadAndShuffle<GPUDevice, Eigen::half, 4,
Dcwise_op_rsqrt.cc19 REGISTER5(UnaryOp, CPU, "Rsqrt", functor::rsqrt, float, Eigen::half, double,
23 REGISTER3(UnaryOp, GPU, "Rsqrt", functor::rsqrt, float, Eigen::half, double);
26 REGISTER2(UnaryOp, SYCL, "Rsqrt", functor::rsqrt, float, double);
29 REGISTER5(SimpleBinaryOp, CPU, "RsqrtGrad", functor::rsqrt_grad, float,
32 REGISTER3(SimpleBinaryOp, GPU, "RsqrtGrad", functor::rsqrt_grad, float,
36 REGISTER2(SimpleBinaryOp, SYCL, "RsqrtGrad", functor::rsqrt_grad, float,
Dcwise_op_sigmoid.cc20 REGISTER5(UnaryOp, CPU, "Sigmoid", functor::sigmoid, float, Eigen::half, double,
23 REGISTER3(UnaryOp, GPU, "Sigmoid", functor::sigmoid, float, Eigen::half,
27 REGISTER(UnaryOp, SYCL, "Sigmoid", functor::sigmoid, float);
30 REGISTER5(SimpleBinaryOp, CPU, "SigmoidGrad", functor::sigmoid_grad, float,
33 REGISTER3(SimpleBinaryOp, GPU, "SigmoidGrad", functor::sigmoid_grad, float,
37 REGISTER(SimpleBinaryOp, SYCL, "SigmoidGrad", functor::sigmoid_grad, float);
Dcwise_op_sqrt.cc19 REGISTER6(UnaryOp, CPU, "Sqrt", functor::sqrt, float, Eigen::half, double,
23 REGISTER3(UnaryOp, GPU, "Sqrt", functor::sqrt, float, Eigen::half, double);
27 REGISTER2(UnaryOp, SYCL, "Sqrt", functor::sqrt, float, double);
30 REGISTER6(SimpleBinaryOp, CPU, "SqrtGrad", functor::sqrt_grad, float,
33 REGISTER3(SimpleBinaryOp, GPU, "SqrtGrad", functor::sqrt_grad, float,
38 REGISTER2(SimpleBinaryOp, SYCL, "SqrtGrad", functor::sqrt_grad, float, double);
Dcwise_op_mod.cc19 REGISTER2(BinaryOp, CPU, "Mod", functor::safe_mod, int32, int64);
20 REGISTER2(BinaryOp, CPU, "Mod", functor::fmod, float, double);
21 REGISTER2(BinaryOp, CPU, "TruncateMod", functor::safe_mod, int32, int64);
22 REGISTER2(BinaryOp, CPU, "TruncateMod", functor::fmod, float, double);
34 BinaryOp<CPUDevice, functor::safe_mod<int32>>);
41 BinaryOp<CPUDevice, functor::safe_mod<int32>>);
Dcwise_op_less.cc19 REGISTER5(BinaryOp, CPU, "Less", functor::less, float, Eigen::half, double,
21 REGISTER5(BinaryOp, CPU, "Less", functor::less, int64, uint8, int8, int16,
25 REGISTER7(BinaryOp, GPU, "Less", functor::less, float, Eigen::half, double,
37 BinaryOp<CPUDevice, functor::less<int32>>);
40 REGISTER3(BinaryOp, SYCL, "Less", functor::less, float, double, int64);
47 BinaryOp<CPUDevice, functor::less<int32>>);
Dcwise_op_floor_div.cc19 REGISTER6(BinaryOp, CPU, "FloorDiv", functor::safe_floor_div, uint8, uint16,
21 REGISTER3(BinaryOp, CPU, "FloorDiv", functor::floor_div_real, float,
25 REGISTER4(BinaryOp, GPU, "FloorDiv", functor::floor_div, uint8, uint16, int16,
27 REGISTER3(BinaryOp, GPU, "FloorDiv", functor::floor_div_real, float,
41 BinaryOp<CPUDevice, functor::safe_floor_div<int32>>);
51 BinaryOp<CPUDevice, functor::safe_floor_div<int32>>);
/external/webrtc/webrtc/base/
Dcallback.h75 template <class T> Callback0(const T& functor) in Callback0() argument
76 : helper_(new RefCountedObject< HelperImpl<T> >(functor)) {} in Callback0()
90 explicit HelperImpl(const T& functor) : functor_(functor) {} in HelperImpl()
105 template <class T> Callback1(const T& functor) in Callback1() argument
106 : helper_(new RefCountedObject< HelperImpl<T> >(functor)) {} in Callback1()
120 explicit HelperImpl(const T& functor) : functor_(functor) {} in HelperImpl()
136 template <class T> Callback2(const T& functor) in Callback2() argument
137 : helper_(new RefCountedObject< HelperImpl<T> >(functor)) {} in Callback2()
151 explicit HelperImpl(const T& functor) : functor_(functor) {} in HelperImpl()
168 template <class T> Callback3(const T& functor) in Callback3() argument
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Dasyncinvoker.h77 void AsyncInvoke(Thread* thread, const FunctorT& functor, uint32_t id = 0) {
79 new RefCountedObject<FireAndForgetAsyncClosure<FunctorT> >(functor));
87 const FunctorT& functor,
91 new RefCountedObject<FireAndForgetAsyncClosure<FunctorT> >(functor));
98 const FunctorT& functor,
104 this, Thread::Current(), functor, callback, callback_host));
112 const FunctorT& functor,
118 this, Thread::Current(), functor, callback, callback_host));
166 bool AsyncInvoke(const FunctorT& functor, uint32_t id = 0) {
170 invoker_.AsyncInvoke<ReturnT, FunctorT>(thread_, functor, id);
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