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/external/mesa3d/src/mesa/sparc/
Dsparc_clip.S108 ld [%i0 + 0x08], %g4 ! LSU Group
112 addcc %g4, %g4, %g4 ! IEU1 Group
114 subcc %g5, %g4, %g0 ! IEU1 Group
115 ld [%i0 + 0x04], %g4 ! LSU Group
117 addcc %g4, %g4, %g4 ! IEU1 Group
119 subcc %g5, %g4, %g0 ! IEU1 Group
120 ld [%i0 + 0x00], %g4 ! LSU Group
122 addcc %g4, %g4, %g4 ! IEU1 Group
124 subcc %g5, %g4, %g0 ! IEU1 Group
130 sll %g3, 8, %g4 ! IEU1 Group
[all …]
/external/llvm/test/CodeGen/SPARC/
Datomics.ll88 ; CHECK: or %g2, %o0, %g4
89 ; CHECK: cas [%o2], %g4, %g3
90 ; CHECK: cmp %g3, %g4
91 ; CHECK: mov %o5, %g4
92 ; CHECK: move %icc, 1, %g4
93 ; CHECK: cmp %g4, 0
96 ; CHECK: and %g3, %o3, %g4
97 ; CHECK: cmp %g2, %g4
99 ; CHECK: mov %g4, %g2
129 ; CHECK: or %g2, %o4, %g4
[all …]
D64spill.ll13 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
24 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
35 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
47 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
58 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
69 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
80 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
91 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
102 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
113 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SPARC/
Datomics.ll88 ; CHECK: or %g2, %o0, %g4
89 ; CHECK: cas [%o2], %g4, %g3
90 ; CHECK: cmp %g3, %g4
91 ; CHECK: mov %o5, %g4
92 ; CHECK: move %icc, 1, %g4
93 ; CHECK: cmp %g4, 0
96 ; CHECK: and %g3, %o3, %g4
97 ; CHECK: cmp %g2, %g4
99 ; CHECK: mov %g4, %g2
129 ; CHECK: or %g2, %o4, %g4
[all …]
D64spill.ll13 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
24 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
35 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
47 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
58 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
69 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
80 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
91 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
102 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
113 … "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~…
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/
Dconstext-immstore.ll14 @g4 = global [4 x %s.0] [%s.0 { i8 1, i8 38, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @g0, i…
42 …store %s.0* getelementptr inbounds ([4 x %s.0], [4 x %s.0]* @g4, i32 0, i32 0), %s.0** @g6, align 4
43 …tr inbounds ([4 x %s.0], [4 x %s.0]* @g4, i32 0, i32 0), %s.0** getelementptr inbounds ([4 x %s.0]…
44 …tr inbounds ([4 x %s.0], [4 x %s.0]* @g4, i32 0, i32 0), %s.0** getelementptr inbounds ([4 x %s.0]…
45 …%v0 = load i8*, i8** getelementptr inbounds ([4 x %s.0], [4 x %s.0]* @g4, i32 0, i32 1, i32 2), al…
49 …%v1 = phi %s.0* [ getelementptr inbounds ([4 x %s.0], [4 x %s.0]* @g4, i32 0, i32 0), %b0 ], [ %v9…
69 …store %s.0* getelementptr inbounds ([4 x %s.0], [4 x %s.0]* @g4, i32 0, i32 1), %s.0** %v14, align…
74 …store %s.0* getelementptr inbounds ([4 x %s.0], [4 x %s.0]* @g4, i32 0, i32 1), %s.0** %v15, align…
80 …%v18 = load i8*, i8** getelementptr inbounds ([4 x %s.0], [4 x %s.0]* @g4, i32 0, i32 2, i32 2), a…
109 …store %s.0* getelementptr inbounds ([4 x %s.0], [4 x %s.0]* @g4, i32 0, i32 2), %s.0** %v34, align…
[all …]
Dmemops_global.ll7 @g4 = common global i32 0, align 4
566 %v0 = load i32, i32* @g4, align 4, !tbaa !5
568 store i32 %v1, i32* @g4, align 4, !tbaa !5
576 %v0 = load i32, i32* @g4, align 4, !tbaa !5
578 store i32 %v1, i32* @g4, align 4, !tbaa !5
586 %v0 = load i32, i32* @g4, align 4, !tbaa !5
588 store i32 %v1, i32* @g4, align 4, !tbaa !5
596 %v0 = load i32, i32* @g4, align 4, !tbaa !5
598 store i32 %v1, i32* @g4, align 4, !tbaa !5
606 %v0 = load i32, i32* @g4, align 4, !tbaa !5
[all …]
/external/clang/test/CodeGen/
Dbitfield-2.c181 struct s4 g4 = { 0xdeadbeef, 0xdeadbeef }; variable
197 struct s4 g4 = { 0xdeadbeef, 0xdeadbeef }; in test_4() local
199 res ^= g4.f0 ^ g4.f1; in test_4()
200 res ^= f4_load(&g4) ^ f4_store(&g4) ^ f4_reload(&g4); in test_4()
201 res ^= g4.f0 ^ g4.f1; in test_4()
/external/deqp-deps/glslang/Test/
Darray100.frag4 float g4[4];
24 g4 = foo(g5); // ERROR
25 g5 = g4; // ERROR
26 gu = g4; // ERROR
31 if (float[4](1.0, 2.0, 3.0, 4.0) == g4) // ERROR
Darray.frag4 float g4[4];
29 g4 = foo(g5);
30 g5 = g4; // ERROR
31 gu = g4; // ERROR
36 if (float[4](1.0, 2.0, 3.0, 4.0) == g4)
D430AofA.frag7 float g4[4][7];
69 g4 = foo(g5);
70 g5 = g4; // ERROR, wrong types
71 gu = g4; // ERROR, not yet sized
76 if (foo(g5) == g4)
D310AofA.vert41 float g4[4][7];
77 g4 = foo(g5);
78 g5 = g4; // ERROR, wrong types
79 gu = g4; // ERROR, not yet sized
84 if (foo(g5) == g4)
Dspv.AofA.frag12 float g4[4][7];
29 g4 = foo(g5);
31 // if (foo(g5) == g4)
/external/clang/test/CodeGenCXX/
Ddefault-arguments.cpp68 void g4(int a, int b = 7); in f4()
70 void g4(int a, int b = 5); in f4()
72 void g4(int a = 5, int b); in f4()
75 g4(); in f4()
/external/mesa3d/src/intel/compiler/
Dtest_eu_compact.cpp177 struct brw_reg g4 = brw_vec8_grf(4, 0); in gen_ADD_GRF_GRF_GRF() local
179 brw_ADD(p, g0, g2, g4); in gen_ADD_GRF_GRF_GRF()
214 struct brw_reg g4 = brw_vec8_grf(4, 0); in gen_ADD_MRF_GRF_GRF() local
216 brw_ADD(p, m6, g2, g4); in gen_ADD_MRF_GRF_GRF()
224 struct brw_reg g4 = brw_vec1_grf(4, 0); in gen_ADD_vec1_GRF_GRF_GRF() local
226 brw_ADD(p, g0, g2, g4); in gen_ADD_vec1_GRF_GRF_GRF()
234 struct brw_reg g4 = brw_vec8_grf(4, 0); in gen_PLN_MRF_GRF_GRF() local
236 brw_PLN(p, m6, interp, g4); in gen_PLN_MRF_GRF_GRF()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Dloh.mir12 @g4 = external global i32
26 ; CHECK-NEXT: $x1 = ADRP target-flags(aarch64-page) @g4
37 $x1 = ADRP target-flags(aarch64-page) @g4
144 ; CHECK-NEXT: $x1 = ADRP target-flags(aarch64-page, aarch64-got) @g4
145 ; CHECK-NEXT: $x1 = LDRXui $x1, target-flags(aarch64-pageoff, aarch64-got) @g4
147 $x1 = ADRP target-flags(aarch64-page, aarch64-got) @g4
148 $x1 = LDRXui $x1, target-flags(aarch64-pageoff, aarch64-got) @g4
160 ; CHECK-NEXT: $x1 = ADRP target-flags(aarch64-page, aarch64-got) @g4
161 ; CHECK-NEXT: $x1 = LDRXui $x1, target-flags(aarch64-pageoff, aarch64-got) @g4
163 $x1 = ADRP target-flags(aarch64-page, aarch64-got) @g4
[all …]
/external/ltp/testcases/network/multicast/mc_member/
Dmc_member_test.c112 unsigned g1, g2, g3, g4; in join_group() local
121 if (sscanf(buf, "%u.%u.%u.%u", &g1, &g2, &g3, &g4) != 4) { in join_group()
127 htonl((g1 << 24) | (g2 << 16) | (g3 << 8) | g4); in join_group()
147 unsigned g1, g2, g3, g4; in leave_group() local
156 if (sscanf(buf, "%u.%u.%u.%u", &g1, &g2, &g3, &g4) != 4) { in leave_group()
162 htonl((g1 << 24) | (g2 << 16) | (g3 << 8) | g4); in leave_group()
/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/MemorySSA/
Dptr-const-mem.ll6 @g4 = external unnamed_addr constant i8, align 1
15 %0 = load i8, i8* @g4, align 1
16 ; Make sure that this load is liveOnEntry just based on the fact that @g4 is
19 ; CHECK-NEXT: load i8, i8* @g4, align 1
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/COFF/
Dcross-section-relative.s21 .globl g4 # @g4 symbol
23 g4: label
/external/llvm/test/MC/COFF/
Dcross-section-relative.s21 .globl g4 # @g4 symbol
23 g4: label
/external/clang/test/Sema/
Dalign-x86.c22 struct __attribute__((packed)) {unsigned int a;} g4; variable
23 short chk1[__alignof__(g4) == 1 ? 1 : -1];
24 short chk2[__alignof__(g4.a) == 1 ? 1 : -1];
/external/clang/test/SemaTemplate/
Dcurrent-instantiation.cpp51 void g4(T&); // expected-note{{previous}}
52 void g4(typename X0::U_type&);
53 void g4(typename X1::my_T_type&); // expected-error{{redecl}}
124 void g4(T&); // expected-note{{previous}}
125 void g4(typename X0::U_type&);
126 void g4(typename X2::my_T_type&); // expected-error{{redecl}}
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dppc64-fastcc-fast-isel.ll5 define fastcc i64 @g1(i64 %g1, double %f1, i64 %g2, double %f2, i64 %g3, double %f3, i64 %g4, doubl…
13 define fastcc i64 @g2(i64 %g1, double %f1, i64 %g2, double %f2, i64 %g3, double %f3, i64 %g4, doubl…
21 define fastcc i64 @g3(i64 %g1, double %f1, i64 %g2, double %f2, i64 %g3, double %f3, i64 %g4, doubl…
29 define fastcc double @f2(i64 %g1, double %f1, i64 %g2, double %f2, i64 %g3, double %f3, i64 %g4, do…
/external/llvm/test/CodeGen/PowerPC/
Dppc64-fastcc-fast-isel.ll5 define fastcc i64 @g1(i64 %g1, double %f1, i64 %g2, double %f2, i64 %g3, double %f3, i64 %g4, doubl…
13 define fastcc i64 @g2(i64 %g1, double %f1, i64 %g2, double %f2, i64 %g3, double %f3, i64 %g4, doubl…
21 define fastcc i64 @g3(i64 %g1, double %f1, i64 %g2, double %f2, i64 %g3, double %f3, i64 %g4, doubl…
29 define fastcc double @f2(i64 %g1, double %f1, i64 %g2, double %f2, i64 %g3, double %f3, i64 %g4, do…
/external/sonivox/arm-wt-22k/vectors/
Dabba.imy9 …g4*5#g3*5#f4*5#f1*5#c1*4b2*5d1*5#c4*4b3*4a4*4b3.*5#c3*5#c2*4b2*4a1.r2*5#c2*4b3*4b1r4r5*5#c2*4b3*4b…

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