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Searched refs:getMaskedMIMGOp (Results 1 – 8 of 8) sorted by relevance

/external/llvm/lib/Target/AMDGPU/
DAMDGPUInstrInfo.cpp62 int AMDGPUInstrInfo::getMaskedMIMGOp(uint16_t Opcode, unsigned Channels) const { in getMaskedMIMGOp() function in AMDGPUInstrInfo
65 case 1: return AMDGPU::getMaskedMIMGOp(Opcode, AMDGPU::Channels_1); in getMaskedMIMGOp()
66 case 2: return AMDGPU::getMaskedMIMGOp(Opcode, AMDGPU::Channels_2); in getMaskedMIMGOp()
67 case 3: return AMDGPU::getMaskedMIMGOp(Opcode, AMDGPU::Channels_3); in getMaskedMIMGOp()
DAMDGPUInstrInfo.h60 int getMaskedMIMGOp(uint16_t Opcode, unsigned Channels) const;
DSIISelLowering.cpp3262 unsigned NewOpcode = TII->getMaskedMIMGOp(MI.getOpcode(), BitsSet); in AdjustInstrPostInstrSelection()
DSIInstrInfo.td3614 def getMaskedMIMGOp : InstrMapping {
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/Utils/
DAMDGPUBaseInfo.h228 int getMaskedMIMGOp(unsigned Opc, unsigned NewChannels);
DAMDGPUBaseInfo.cpp123 int getMaskedMIMGOp(unsigned Opc, unsigned NewChannels) { in getMaskedMIMGOp() function
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/Disassembler/
DAMDGPUDisassembler.cpp335 NewOpcode = AMDGPU::getMaskedMIMGOp(MI.getOpcode(), 2); in convertMIMGInst()
339 NewOpcode = AMDGPU::getMaskedMIMGOp(MI.getOpcode(), DstSize); in convertMIMGInst()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp7993 int NewOpcode = AMDGPU::getMaskedMIMGOp(Node->getMachineOpcode(), BitsSet); in adjustWritemask()