Searched refs:getReservedTmpReg (Results 1 – 4 of 4) sorted by relevance
/external/swiftshader/third_party/subzero/src/ |
D | IceTargetLoweringARM32.h | 126 RegNumT getReservedTmpReg() const { return RegARM32::Reg_ip; } in getReservedTmpReg() function 1187 TempBaseReg->getRegNum() == Target->getReservedTmpReg()); in assertNoTempOrAssignedToIP()
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D | IceTargetLoweringARM32.cpp | 1625 Legal_Reg | Legal_Flex, getReservedTmpReg()); in addProlog() 1729 Legal_Reg | Legal_Flex, getReservedTmpReg()); in addEpilog() 1784 if (ScratchRegNum == Target->getReservedTmpReg()) { in newBaseRegister() 1816 newBaseRegister(Base, Offset, Target->getReservedTmpReg()); in createMemOperand() 1823 newBaseRegister(Base, Offset, Target->getReservedTmpReg()); in createMemOperand() 1843 assert(TempBaseReg->getRegNum() == Target->getReservedTmpReg()); in resetTempBaseIfClobberedBy() 1990 Base = newBaseRegister(Base, Offset, Target->getReservedTmpReg()); in legalizeMemOperand() 2009 Base = newBaseRegister(Base, Offset, Target->getReservedTmpReg()); in legalizeMemOperand()
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D | IceTargetLoweringMIPS32.h | 94 RegNumT getReservedTmpReg() const { return RegMIPS32::Reg_AT; } in getReservedTmpReg() function
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D | IceTargetLoweringMIPS32.cpp | 2051 auto *Reg = Target->makeReg(IceType_i32, Target->getReservedTmpReg()); in legalizeMov() 2140 Base = newBaseRegister(Base, Offset, Target->getReservedTmpReg()); in legalizeMemOperand() 2155 Variable *TReg = Target->makeReg(IceType_i32, Target->getReservedTmpReg()); in legalizeImmediate() 2156 Reg = Target->makeReg(IceType_i32, Target->getReservedTmpReg()); in legalizeImmediate()
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