/external/deqp/framework/common/ |
D | tcuTexVerifierUtil.cpp | 120 static inline int imod (int a, int b) in imod() function 145 return imod(c, size); in wrap() 153 return (size - 1) - mirror(imod(c, 2*size) - size); in wrap()
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | invalid-CPS2p-arm.txt | 3 # invalid imod value (0b01)
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D | invalid-CPS3p-arm.txt | 3 # invalid (imod, M, iflags) combination
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/external/icu/icu4c/source/test/intltest/ |
D | numbertest_patternmodifier.cpp | 114 LocalPointer<ImmutablePatternModifier> imod(mod.createImmutable(status), status); in testPatternWithNoPlaceholder() local 122 imod->applyToMicros(micros, quantity); in testPatternWithNoPlaceholder()
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/external/python/cpython3/Lib/ |
D | operator.py | 365 def imod(a, b): function 456 __imod__ = imod
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/external/capstone/arch/ARM/ |
D | ARMDisassembler.c | 2003 unsigned imod = fieldFromInstruction_4(Insn, 18, 2); in DecodeCPSInstruction() local 2022 if (imod == 1) return MCDisassembler_Fail; in DecodeCPSInstruction() 2024 if (imod && M) { in DecodeCPSInstruction() 2026 MCOperand_CreateImm0(Inst, imod); in DecodeCPSInstruction() 2029 } else if (imod && !M) { in DecodeCPSInstruction() 2031 MCOperand_CreateImm0(Inst, imod); in DecodeCPSInstruction() 2034 } else if (!imod && M) { in DecodeCPSInstruction() 2051 unsigned imod = fieldFromInstruction_4(Insn, 9, 2); in DecodeT2CPSInstruction() local 2063 if (imod == 1) return MCDisassembler_Fail; in DecodeT2CPSInstruction() 2065 if (imod && M) { in DecodeT2CPSInstruction() [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 1707 unsigned imod = fieldFromInstruction32(Insn, 18, 2); in DecodeCPSInstruction() local 1719 if (imod == 1) return MCDisassembler::Fail; in DecodeCPSInstruction() 1721 if (imod && M) { in DecodeCPSInstruction() 1723 Inst.addOperand(MCOperand::CreateImm(imod)); in DecodeCPSInstruction() 1726 } else if (imod && !M) { in DecodeCPSInstruction() 1728 Inst.addOperand(MCOperand::CreateImm(imod)); in DecodeCPSInstruction() 1731 } else if (!imod && M) { in DecodeCPSInstruction() 1747 unsigned imod = fieldFromInstruction32(Insn, 9, 2); in DecodeT2CPSInstruction() local 1759 if (imod == 1) return MCDisassembler::Fail; in DecodeT2CPSInstruction() 1761 if (imod && M) { in DecodeT2CPSInstruction() [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrThumb.td | 288 def tCPS : T1I<(outs), (ins imod_op:$imod, iflags_op:$iflags), 289 NoItinerary, "cps$imod $iflags", []>, 292 bit imod; 295 let Inst{4} = imod; 1435 def : tInstAlias<"cps$imod", (tCPS imod_op:$imod, 0)>; 1436 def : tInstAlias<"cps$imod", (tCPS imod_op:$imod, 0)>;
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D | ARMInstrThumb2.td | 3273 bits<2> imod; 3284 let Inst{10-9} = imod; 3292 def t2CPS3p : t2CPS<(ins imod_op:$imod, iflags_op:$iflags, i32imm:$mode), 3293 "$imod.w\t$iflags, $mode">; 3295 def t2CPS2p : t2CPS<(ins imod_op:$imod, iflags_op:$iflags), 3296 "$imod.w\t$iflags">; 3297 let imod = 0, iflags = 0, M = 1 in
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/external/llvm/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 1979 unsigned imod = fieldFromInstruction(Insn, 18, 2); in DecodeCPSInstruction() local 1998 if (imod == 1) return MCDisassembler::Fail; in DecodeCPSInstruction() 2000 if (imod && M) { in DecodeCPSInstruction() 2002 Inst.addOperand(MCOperand::createImm(imod)); in DecodeCPSInstruction() 2005 } else if (imod && !M) { in DecodeCPSInstruction() 2007 Inst.addOperand(MCOperand::createImm(imod)); in DecodeCPSInstruction() 2010 } else if (!imod && M) { in DecodeCPSInstruction() 2026 unsigned imod = fieldFromInstruction(Insn, 9, 2); in DecodeT2CPSInstruction() local 2038 if (imod == 1) return MCDisassembler::Fail; in DecodeT2CPSInstruction() 2040 if (imod && M) { in DecodeT2CPSInstruction() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 1978 unsigned imod = fieldFromInstruction(Insn, 18, 2); in DecodeCPSInstruction() local 1997 if (imod == 1) return MCDisassembler::Fail; in DecodeCPSInstruction() 1999 if (imod && M) { in DecodeCPSInstruction() 2001 Inst.addOperand(MCOperand::createImm(imod)); in DecodeCPSInstruction() 2004 } else if (imod && !M) { in DecodeCPSInstruction() 2006 Inst.addOperand(MCOperand::createImm(imod)); in DecodeCPSInstruction() 2009 } else if (!imod && M) { in DecodeCPSInstruction() 2025 unsigned imod = fieldFromInstruction(Insn, 9, 2); in DecodeT2CPSInstruction() local 2037 if (imod == 1) return MCDisassembler::Fail; in DecodeT2CPSInstruction() 2039 if (imod && M) { in DecodeT2CPSInstruction() [all …]
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb.td | 342 def tCPS : T1I<(outs), (ins imod_op:$imod, iflags_op:$iflags), 343 NoItinerary, "cps$imod $iflags", []>, 346 bit imod; 349 let Inst{4} = imod; 1552 def : tInstAlias<"cps$imod", (tCPS imod_op:$imod, 0)>; 1553 def : tInstAlias<"cps$imod", (tCPS imod_op:$imod, 0)>;
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D | ARMInstrThumb2.td | 3691 bits<2> imod; 3697 let Inst{10-9} = imod; 3705 def t2CPS3p : t2CPS<(ins imod_op:$imod, iflags_op:$iflags, i32imm:$mode), 3706 "$imod\t$iflags, $mode">; 3708 def t2CPS2p : t2CPS<(ins imod_op:$imod, iflags_op:$iflags), 3709 "$imod.w\t$iflags">; 3710 let imod = 0, iflags = 0, M = 1 in 3713 def : t2InstAlias<"cps$imod.w $iflags, $mode", 3714 (t2CPS3p imod_op:$imod, iflags_op:$iflags, i32imm:$mode), 0>;
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/external/llvm/test/MC/Disassembler/ARM/ |
D | invalid-armv7.txt | 36 # invalid imod value (0b01) 41 # invalid (imod, M, iflags) combination
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | invalid-armv7.txt | 36 # invalid imod value (0b01) 41 # invalid (imod, M, iflags) combination
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/external/python/cpython3/Doc/library/ |
D | operator.rst | 504 .. function:: imod(a, b) 507 ``a = imod(a, b)`` is equivalent to ``a %= b``.
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/external/python/cpython2/Doc/library/ |
D | operator.rst | 367 .. function:: imod(a, b) 370 ``a = imod(a, b)`` is equivalent to ``a %= b``.
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMInstrThumb.td | 359 def tCPS : T1I<(outs), (ins imod_op:$imod, iflags_op:$iflags), 360 NoItinerary, "cps$imod $iflags", []>, 363 bit imod; 366 let Inst{4} = imod;
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D | ARMInstrThumb2.td | 3677 bits<2> imod; 3683 let Inst{10-9} = imod; 3691 def t2CPS3p : t2CPS<(ins imod_op:$imod, iflags_op:$iflags, i32imm:$mode), 3692 "$imod\t$iflags, $mode">; 3694 def t2CPS2p : t2CPS<(ins imod_op:$imod, iflags_op:$iflags), 3695 "$imod.w\t$iflags">; 3696 let imod = 0, iflags = 0, M = 1 in 3699 def : t2InstAlias<"cps$imod.w $iflags, $mode", 3700 (t2CPS3p imod_op:$imod, iflags_op:$iflags, i32imm:$mode), 0>;
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/external/deqp/external/vulkancts/modules/vulkan/ycbcr/ |
D | vktYCbCrUtil.cpp | 1522 int imod (int a, int b) in imod() function 1749 return (size - 1) - mirror(imod(coord, 2 * size) - size); in wrap() 1752 return imod(coord, size); in wrap()
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/external/swiftshader/src/Shader/ |
D | ShaderCore.hpp | 264 void imod(Vector4f &dst, const Vector4f &src0, const Vector4f &src1);
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/external/python/cpython2/Modules/ |
D | operator.c | 412 spam2(imod,__imod__, "a = imod(a, b) -- Same as a %= b.")
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/external/swiftshader/src/Pipeline/ |
D | ShaderCore.hpp | 264 void imod(Vector4f &dst, const Vector4f &src0, const Vector4f &src1);
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/external/python/cpython2/Lib/test/ |
D | test_operator.py | 496 self.assertEqual(operator.imod (c, 5), "imod")
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/external/python/cpython3/Lib/test/ |
D | test_operator.py | 453 self.assertEqual(operator.imod (c, 5), "imod")
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