/external/u-boot/arch/arm/include/asm/arch-rockchip/ |
D | clock.h | 56 static inline u32 clk_get_divisor(ulong input_rate, uint output_rate) in clk_get_divisor() argument 60 clk_div = input_rate / output_rate; in clk_get_divisor()
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/external/u-boot/drivers/spi/ |
D | rk_spi.c | 48 uint input_rate; member 83 uint clk_div = DIV_ROUND_UP(priv->input_rate, speed); in rkspi_set_clk() 95 __func__, speed, priv->input_rate / clk_div); in rkspi_set_clk() 264 priv->input_rate = ret; in rockchip_spi_probe() 265 debug("%s: rate = %u\n", __func__, priv->input_rate); in rockchip_spi_probe()
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/external/u-boot/drivers/clk/rockchip/ |
D | clk_rk3036.c | 26 #define RATE_TO_DIV(input_rate, output_rate) \ argument 27 ((input_rate) / (output_rate) - 1); 29 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
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D | clk_rk3328.c | 28 #define RATE_TO_DIV(input_rate, output_rate) \ argument 29 ((input_rate) / (output_rate) - 1); 30 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
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D | clk_rv1108.c | 27 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
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D | clk_rk3399.c | 40 #define RATE_TO_DIV(input_rate, output_rate) \ argument 41 ((input_rate) / (output_rate) - 1); 42 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
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D | clk_rk322x.c | 26 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
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D | clk_rk3188.c | 71 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
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D | clk_rk3128.c | 27 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
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D | clk_rk3368.c | 41 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
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D | clk_rk3288.c | 130 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
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/external/u-boot/arch/arm/mach-exynos/ |
D | clock.c | 1395 unsigned int fine_scalar_bits, unsigned int input_rate, in clock_calc_best_scalar() argument 1404 debug("Input Rate is %u, Target is %u, Cap is %u\n", input_rate, in clock_calc_best_scalar() 1412 if (input_rate == 0 || target_rate == 0) in clock_calc_best_scalar() 1415 if (target_rate >= input_rate) in clock_calc_best_scalar() 1420 max(min(input_rate / i / target_rate, cap), 1U); in clock_calc_best_scalar() 1421 const unsigned int effective_rate = input_rate / i / in clock_calc_best_scalar()
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/external/u-boot/drivers/clk/aspeed/ |
D | clk_ast2500.c | 178 static ulong ast2500_calc_clock_config(ulong input_rate, ulong requested_rate, in ast2500_calc_clock_config() argument 185 const ulong input_rate_khz = input_rate / 1000; in ast2500_calc_clock_config()
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/external/webrtc/webrtc/modules/audio_processing/test/ |
D | audio_processing_unittest.cc | 258 int input_rate, in OutputFilePath() argument 268 ss << name << "_i" << num_input_channels << "_" << input_rate / 1000 << "_ir" in OutputFilePath() 2383 static void ProcessFormat(int input_rate, in ProcessFormat() argument 2398 {{input_rate, num_input_channels}, in ProcessFormat() 2406 FILE* near_file = fopen(ResourceFilePath("near", input_rate).c_str(), "rb"); in ProcessFormat() 2408 fopen(OutputFilePath(output_file_prefix, input_rate, output_rate, in ProcessFormat() 2415 fopen(OutputFilePath(output_file_prefix, input_rate, output_rate, in ProcessFormat() 2426 ChannelBuffer<float> fwd_cb(SamplesFromRate(input_rate), in ProcessFormat() 2456 input_rate, in ProcessFormat()
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