| /external/compiler-rt/test/profile/ |
| D | instrprof-shared.test | 6 3. libt-no-instr2.so is built with profile rt linked in (via -u<hook>), but the object file is built
19 RUN: %clang -c -o %t.d/instrprof-shared-lib-no-instr2.o -fPIC %S/Inputs/instrprof-shared-lib.c
20 RUN: %clang_profgen -o %t.d/libt-no-instr2.so -fPIC -shared %t.d/instrprof-shared-lib-no-instr2.o
24 RUN: %clang_profgen -o %t-instr-no-instr2 -L%t.d -rpath %t.d -lt-no-instr2 %S/Inputs/instrprof-sha…
27 RUN: %clang -o %t-no-instr1-no-instr2 -L%t.d -rpath %t.d -lt-no-instr2 %S/Inputs/instrprof-shared-…
28 RUN: %clang -c -o %t.d/instrprof-shared-main-no-instr2.o %S/Inputs/instrprof-shared-main.c
29 RUN: %clang -o %t-no-instr2-instr -L%t.d -rpath %t.d -lt-instr %t.d/instrprof-shared-main-no-instr…
30 RUN: %clang -o %t-no-instr2-no-instr1 -L%t.d -rpath %t.d -lt-no-instr1 %t.d/instrprof-shared-main-…
31 RUN: %clang -o %t-no-instr2-no-instr2 -L%t.d -rpath %t.d -lt-no-instr2 %t.d/instrprof-shared-main-…
35 RUN: env LLVM_PROFILE_FILE=%t-instr-no-instr2.profraw %run %t-instr-no-instr2
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| /external/tensorflow/tensorflow/compiler/xla/service/ |
| D | multi_output_fusion.cc | 114 HloInstruction* instr2) { in Fuse() argument
116 HloInstruction* fused = instr2; in Fuse()
150 void MultiOutputFusion::Update(HloInstruction* instr1, HloInstruction* instr2) { in Update() argument
152 HloInstruction* fused = instr2; in Update()
154 fusion = instr2; in Update()
217 HloInstruction* instr2) { in LegalToFuse() argument
218 if (instr1 == instr2) { in LegalToFuse()
227 if (instr1->user_count() == 0 || instr2->user_count() == 0) { in LegalToFuse()
246 multioutput_user_is_not_gte(instr2)) { in LegalToFuse()
250 if (is_connected(instr1, instr2)) { in LegalToFuse()
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| D | multi_output_fusion.h | 66 HloInstruction* instr2) = 0;
73 virtual int64 GetProfit(HloInstruction* instr1, HloInstruction* instr2) = 0;
79 virtual bool LegalToFuse(HloInstruction* instr1, HloInstruction* instr2);
83 virtual HloInstruction* Fuse(HloInstruction* instr1, HloInstruction* instr2);
96 HloInstruction* instr1, HloInstruction* instr2,
116 void Update(HloInstruction* instr1, HloInstruction* instr2);
142 HloInstruction* instr2; member
144 ToBeFused(HloInstruction* instr1, HloInstruction* instr2, int64 score) in ToBeFused()
145 : instr1(instr1), instr2(instr2), score(score) {} in ToBeFused()
162 bool is_connected(HloInstruction* instr1, HloInstruction* instr2) { in is_connected() argument
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| D | hlo_verifier.cc | 1083 const HloInstruction* instr2) { in CheckSameChannel() argument
1084 if (instr1->channel_id() != instr2->channel_id()) { in CheckSameChannel()
1088 instr1->ToString(), instr1->channel_id(), instr2->ToString(), in CheckSameChannel()
1089 instr2->channel_id()); in CheckSameChannel()
1098 const HloInstruction* instr2) { in CheckSameIsHostTransfer() argument
1102 DynCast<const HloSendRecvInstruction>(instr2); in CheckSameIsHostTransfer()
1110 instr1->ToString(), instr2->ToString()); in CheckSameIsHostTransfer()
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| D | hlo_instruction_test.cc | 1699 auto instr2 = instr1->Clone(); in TEST_F() local
1700 EXPECT_TRUE(instr1->Identical(*instr2)); in TEST_F()
1704 EXPECT_FALSE(instr1->Identical(*instr2)); in TEST_F()
1711 auto instr2 = instr1->Clone(); in TEST_F() local
1712 EXPECT_TRUE(instr1->Identical(*instr2)); in TEST_F()
1717 EXPECT_FALSE(instr1->Identical(*instr2)); in TEST_F()
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| /external/tensorflow/tensorflow/compiler/xla/service/gpu/ |
| D | multi_output_fusion.cc | 43 HloInstruction* instr2) { in ShapesCompatibleForFusion() argument
44 return ShapesCompatibleForMultiOutputFusion(*instr1, *instr2); in ShapesCompatibleForFusion()
60 HloInstruction* instr2) { in GetProfit() argument
69 for (auto instr : instr2->operands()) { in GetProfit()
75 VLOG(2) << "Fusing instr1=" << instr1->name() << " instr2=" << instr2->name() in GetProfit()
81 HloInstruction* instr2) { in LegalToFuse() argument
82 if (!MultiOutputFusion::LegalToFuse(instr1, instr2)) { in LegalToFuse()
93 if ((instr2->opcode() == HloOpcode::kFusion && in LegalToFuse()
94 instr1->fusion_kind() != instr2->fusion_kind()) || in LegalToFuse()
95 (IsReductionToVector(*instr2) && in LegalToFuse()
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| D | multi_output_fusion.h | 34 HloInstruction* instr2) override;
44 int64 GetProfit(HloInstruction* instr1, HloInstruction* instr2) override;
47 bool LegalToFuse(HloInstruction* instr1, HloInstruction* instr2) override;
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| D | gpu_fusible.cc | 90 const HloInstruction& instr2) { in ShapesCompatibleForMultiOutputFusion() argument
128 auto* instr_2 = get_real_hero(&instr2); in ShapesCompatibleForMultiOutputFusion()
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| D | gpu_fusible.h | 70 const HloInstruction& instr2);
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| /external/v8/src/mips/ |
| D | assembler-mips-inl.h | 145 Instr instr2 = Assembler::instr_at(pc + 1 * kInstrSize); in set_target_internal_reference_encoded_at() local
147 DCHECK(Assembler::IsOri(instr2) || Assembler::IsJicOrJialc(instr2)); in set_target_internal_reference_encoded_at()
149 instr2 &= ~kImm16Mask; in set_target_internal_reference_encoded_at()
152 if (Assembler::IsJicOrJialc(instr2)) { in set_target_internal_reference_encoded_at()
158 Assembler::instr_at_put(pc + 1 * kInstrSize, instr2 | jic_offset_u); in set_target_internal_reference_encoded_at()
163 Assembler::instr_at_put(pc + 1 * kInstrSize, instr2 | (imm & kImm16Mask)); in set_target_internal_reference_encoded_at()
226 Instr instr2 = Assembler::instr_at(pc_ + 1 * kInstrSize); in target_internal_reference() local
228 DCHECK(Assembler::IsOri(instr2) || Assembler::IsJicOrJialc(instr2)); in target_internal_reference()
229 if (Assembler::IsJicOrJialc(instr2)) { in target_internal_reference()
231 Assembler::CreateTargetAddress(instr1, instr2)); in target_internal_reference()
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| D | assembler-mips.cc | 892 Instr instr2 = instr_at(pos + 1 * kInstrSize); in target_at() local
893 DCHECK(IsOri(instr2) || IsJicOrJialc(instr2)); in target_at()
895 if (IsJicOrJialc(instr2)) { in target_at()
896 imm = CreateTargetAddress(instr1, instr2); in target_at()
899 imm |= (instr2 & static_cast<int32_t>(kImm16Mask)); in target_at()
1020 Instr instr2 = instr_at(pos + 1 * kInstrSize); in target_at_put() local
1021 DCHECK(IsOri(instr2) || IsJicOrJialc(instr2)); in target_at_put()
1024 DCHECK(IsLui(instr1) && (IsJicOrJialc(instr2) || IsOri(instr2))); in target_at_put()
1026 instr2 &= ~kImm16Mask; in target_at_put()
1028 if (IsJicOrJialc(instr2)) { in target_at_put()
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| /external/v8/src/ppc/ |
| D | assembler-ppc-inl.h | 280 Instr instr2 = instr_at(pc + kInstrSize); in target_address_at() local
282 if (IsLis(instr1) && IsOri(instr2)) { in target_address_at()
288 static_cast<uint32_t>(instr2 & kImm16Mask)); in target_address_at()
295 (instr2 & kImm16Mask)); in target_address_at()
398 Instr instr2 = instr_at(pc + kInstrSize); in PatchConstantPoolAccessInstruction() local
401 instr2 &= ~kImm16Mask; in PatchConstantPoolAccessInstruction()
402 instr2 |= (lo_word & kImm16Mask); in PatchConstantPoolAccessInstruction()
404 instr_at_put(pc + kInstrSize, instr2); in PatchConstantPoolAccessInstruction()
463 Instr instr2 = instr_at(pc + kInstrSize); in set_target_address_at() local
465 if (IsLis(instr1) && IsOri(instr2)) { in set_target_address_at()
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| D | assembler-ppc.cc | 338 bool Assembler::Is64BitLoadIntoR12(Instr instr1, Instr instr2, Instr instr3, in Is64BitLoadIntoR12() argument
346 return (((instr1 >> 16) == 0x3D80) && ((instr2 >> 16) == 0x618C) && in Is64BitLoadIntoR12()
352 bool Assembler::Is32BitLoadIntoR12(Instr instr1, Instr instr2) { in Is32BitLoadIntoR12() argument
356 return (((instr1 >> 16) == 0x3D80) && ((instr2 >> 16) == 0x618C)); in Is32BitLoadIntoR12()
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| D | assembler-ppc.h | 1381 static bool Is64BitLoadIntoR12(Instr instr1, Instr instr2, Instr instr3,
1384 static bool Is32BitLoadIntoR12(Instr instr1, Instr instr2);
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| /external/mesa3d/src/compiler/nir/ |
| D | nir_instr_set.c | 254 nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2) in nir_instrs_equal() argument
256 if (instr1->type != instr2->type) in nir_instrs_equal()
262 nir_alu_instr *alu2 = nir_instr_as_alu(instr2); in nir_instrs_equal()
294 nir_tex_instr *tex2 = nir_instr_as_tex(instr2); in nir_instrs_equal()
328 nir_load_const_instr *load2 = nir_instr_as_load_const(instr2); in nir_instrs_equal()
341 nir_phi_instr *phi2 = nir_instr_as_phi(instr2); in nir_instrs_equal()
361 nir_intrinsic_instr *intrinsic2 = nir_instr_as_intrinsic(instr2); in nir_instrs_equal()
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| /external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
| D | ir3_sched.c | 73 list_for_each_entry (struct ir3_instruction, instr2, &ctx->depth_list, node) { in clear_cache()
74 if ((instr2->data == instr) || (instr2->data == NULL_INSTR) || !instr) in clear_cache()
75 instr2->data = NULL; in clear_cache()
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| /external/tensorflow/tensorflow/compiler/tf2xla/ |
| D | xla_compiler_test.cc | 708 auto instr2 = c2.instructions(j); in TEST_F() local
712 instr2.clear_name(); in TEST_F()
713 instr2.clear_id(); in TEST_F()
714 instr2.clear_operand_ids(); in TEST_F()
720 LOG(INFO) << "instr2 = " << instr2.DebugString(); in TEST_F()
722 instr2.AppendPartialToString(&str2); in TEST_F()
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| /external/v8/src/s390/ |
| D | assembler-s390.cc | 398 bool Assembler::Is64BitLoadIntoIP(SixByteInstr instr1, SixByteInstr instr2) { in Is64BitLoadIntoIP() argument
400 return (((instr1 >> 32) == 0xC0C8) && ((instr2 >> 32) == 0xC0C9)); in Is64BitLoadIntoIP()
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| D | assembler-s390.h | 1535 static bool Is64BitLoadIntoIP(SixByteInstr instr1, SixByteInstr instr2);
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| /external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
| D | MergeFunctions.rst | 415 instr0 i32 %pf0 instr1 i32 %pf1 instr2 i32 123
421 instr0 i32 %pg0 instr1 i32 %pg0 instr2 i32 123
434 And instructions with opcode "*instr2*" are equal, because their opcodes and
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| /external/llvm/docs/ |
| D | MergeFunctions.rst | 415 instr0 i32 %pf0 instr1 i32 %pf1 instr2 i32 123
421 instr0 i32 %pg0 instr1 i32 %pg0 instr2 i32 123
434 And instructions with opcode "*instr2*" are equal, because their opcodes and
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| /external/icu/icu4c/source/test/intltest/ |
| D | regextst.cpp | 750 UnicodeString instr2 = "not abc"; in API_Match() local
761 m1->reset(instr2); in API_Match()
763 REGEX_ASSERT(m1->input() == instr2); in API_Match()
805 m1->reset(instr2); in API_Match()
846 m1->reset(instr2); // "not abc" in API_Match()
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| /external/v8/src/compiler/arm/ |
| D | code-generator-arm.cc | 419 #define ASSEMBLE_ATOMIC64_ARITH_BINOP(instr1, instr2) \ argument
428 __ instr2(i.TempRegister(2), i.OutputRegister(1), \
2790 #define ATOMIC_ARITH_BINOP_CASE(op, instr1, instr2) \ in AssembleArchInstruction() argument
2792 ASSEMBLE_ATOMIC64_ARITH_BINOP(instr1, instr2); \ in AssembleArchInstruction()
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| /external/v8/src/compiler/ia32/ |
| D | code-generator-ia32.cc | 430 #define ASSEMBLE_I64ATOMIC_BINOP(instr1, instr2) \ argument
439 __ instr2(i.InputRegister(1), i.OutputRegister(1)); \
3807 #define ATOMIC_BINOP_CASE(op, instr1, instr2) \ in AssembleArchInstruction() argument
3809 ASSEMBLE_I64ATOMIC_BINOP(instr1, instr2) \ in AssembleArchInstruction()
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