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Searched refs:isLdstScaledReg (Results 1 – 4 of 4) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h168 bool isLdstScaledReg(const MachineInstr &MI, unsigned Op) const;
DARMScheduleA57.td60 SchedPredicate<[{TII->isLdstScaledReg(*MI, 1)}]>;
62 SchedPredicate<[{TII->isLdstScaledReg(*MI, 2)}]>;
DARMBaseInstrInfo.cpp588 bool ARMBaseInstrInfo::isLdstScaledReg(const MachineInstr &MI, in isLdstScaledReg() function in ARMBaseInstrInfo
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
DARMGenSubtargetInfo.inc19736 if ((TII->isLdstScaledReg(*MI, 2))
19745 if ((TII->isLdstScaledReg(*MI, 2)))
19755 if ((TII->isLdstScaledReg(*MI, 2))
19764 if ((TII->isLdstScaledReg(*MI, 2)))