Searched refs:isLdstScaledRegNotPlusLsl2 (Results 1 – 4 of 4) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.h | 170 bool isLdstScaledRegNotPlusLsl2(const MachineInstr &MI, unsigned Op) const;
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D | ARMScheduleA57.td | 52 SchedPredicate<[{TII->isLdstScaledRegNotPlusLsl2(*MI, 0)}]>; 54 SchedPredicate<[{TII->isLdstScaledRegNotPlusLsl2(*MI, 1)}]>; 56 SchedPredicate<[{TII->isLdstScaledRegNotPlusLsl2(*MI, 2)}]>;
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D | ARMBaseInstrInfo.cpp | 596 bool ARMBaseInstrInfo::isLdstScaledRegNotPlusLsl2(const MachineInstr &MI, in isLdstScaledRegNotPlusLsl2() function in ARMBaseInstrInfo
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
D | ARMGenSubtargetInfo.inc | 17388 if ((TII->isLdstScaledRegNotPlusLsl2(*MI, 1))) 17584 if ((TII->isLdstScaledRegNotPlusLsl2(*MI, 1))) 18224 if ((TII->isLdstScaledRegNotPlusLsl2(*MI, 1))) 18234 if ((TII->isLdstScaledRegNotPlusLsl2(*MI, 1))) 19604 if ((TII->isLdstScaledRegNotPlusLsl2(*MI, 2))) 19612 if ((TII->isLdstScaledRegNotPlusLsl2(*MI, 2))) 19660 if ((TII->isLdstScaledRegNotPlusLsl2(*MI, 0))) 19737 && (TII->isLdstScaledRegNotPlusLsl2(*MI, 2))) 19740 && (TII->isLdstScaledRegNotPlusLsl2(*MI, 2))) 19743 && (TII->isLdstScaledRegNotPlusLsl2(*MI, 2))) [all …]
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