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Searched refs:larl (Results 1 – 25 of 103) sorted by relevance

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/external/llvm/test/CodeGen/SystemZ/
Dvec-args-06.ll9 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
11 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
13 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
15 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
17 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
19 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
21 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
23 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
43 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
46 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
[all …]
Dla-01.ll23 ; CHECK: larl %r2, e4
31 ; CHECK: larl %r2, d4
39 ; CHECK: larl %r2, e2
47 ; CHECK: larl %r2, d2
71 ; CHECK: larl %r2, ef
79 ; CHECK: larl %r2, df
87 ; CHECK: larl %r2, d2
89 ; CHECK: larl %r2, d2
Dargs-07.ll31 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
33 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
35 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
37 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
Dla-03.ll42 ; CHECK: larl %r2, pv
50 ; CHECK: larl %r2, hv
74 ; CHECK: larl %r2, pf
82 ; CHECK: larl %r2, hf
Dint-move-09.ll114 ; CHECK: larl [[REG:%r[0-5]]], gsrc32u
125 ; CHECK: larl [[REG:%r[0-5]]], gsrc32u
147 ; CHECK: larl [[REG:%r[0-5]]], gdst32u
158 ; CHECK: larl [[REG:%r[0-5]]], gsrc64u
160 ; CHECK: larl [[REG:%r[0-5]]], gdst64u
Dtls-04.ll17 ; CHECK-MAIN-DAG: larl %r12, _GLOBAL_OFFSET_TABLE_
20 ; CHECK-MAIN: larl %r1, .LCP{{.*}}_1
Dint-move-08.ll93 ; CHECK: larl [[REG:%r[0-5]]], gsrc32u
95 ; CHECK: larl [[REG:%r[0-5]]], gdst32u
107 ; CHECK: larl [[REG:%r[0-5]]], garray8
Dvec-args-04.ll35 ; CHECK-STACK-DAG: larl [[REG1:%r[0-9]+]], .LCPI0_0
39 ; CHECK-STACK-DAG: larl [[REG2:%r[0-9]+]], .LCPI0_1
Dpie.ll9 ; CHECK: larl %r2, foo{{$}}
Dfp-const-03.ll8 ; CHECK: larl [[REGISTER:%r[1-5]]], {{.*}}
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dvec-args-06.ll9 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
11 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
13 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
15 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
17 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
19 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
21 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
23 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
43 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
46 ; CHECK-DAG: larl [[TMP:%r[0-5]]], .LCPI
[all …]
Dla-01.ll23 ; CHECK: larl %r2, e4
31 ; CHECK: larl %r2, d4
39 ; CHECK: larl %r2, e2
47 ; CHECK: larl %r2, d2
71 ; CHECK: larl %r2, ef
79 ; CHECK: larl %r2, df
87 ; CHECK: larl %r2, d2
89 ; CHECK: larl %r2, d2
Dargs-07.ll31 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
33 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
35 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
37 ; CHECK: larl [[TMP:%r[0-5]]], .LCPI
Dla-03.ll42 ; CHECK: larl %r2, pv
50 ; CHECK: larl %r2, hv
74 ; CHECK: larl %r2, pf
82 ; CHECK: larl %r2, hf
Dint-move-09.ll114 ; CHECK: larl [[REG:%r[0-5]]], gsrc32u
125 ; CHECK: larl [[REG:%r[0-5]]], gsrc32u
147 ; CHECK: larl [[REG:%r[0-5]]], gdst32u
158 ; CHECK: larl [[REG:%r[0-5]]], gsrc64u
160 ; CHECK: larl [[REG:%r[0-5]]], gdst64u
Dknownbits-intrinsics-unpack.ll29 ; CHECK-NEXT: larl %r1, .LCPI
57 ; CHECK-NEXT: larl %r1, .LCPI
88 ; CHECK-NEXT: larl %r1, .LCPI
116 ; CHECK-NEXT: larl %r1, .LCPI
145 ; CHECK-NEXT: larl %r1, .LCPI
169 ; CHECK-NEXT: larl %r1, .LCPI
199 ; CHECK-NEXT: larl %r1, .LCPI
227 ; CHECK-NEXT: larl %r1, .LCPI
259 ; CHECK-NEXT: larl %r1, .LCPI
287 ; CHECK-NEXT: larl %r1, .LCPI
[all …]
Dtls-04.ll17 ; CHECK-MAIN-DAG: larl %r12, _GLOBAL_OFFSET_TABLE_
20 ; CHECK-MAIN: larl %r1, .LCP{{.*}}_1
Dint-move-08.ll93 ; CHECK: larl [[REG:%r[0-5]]], gsrc32u
95 ; CHECK: larl [[REG:%r[0-5]]], gdst32u
107 ; CHECK: larl [[REG:%r[0-5]]], garray8
Dvec-args-04.ll35 ; CHECK-STACK-DAG: larl [[REG1:%r[0-9]+]], .LCPI0_0
39 ; CHECK-STACK-DAG: larl [[REG2:%r[0-9]+]], .LCPI0_1
Dpie.ll9 ; CHECK: larl %r2, foo{{$}}
Dfp-const-06.ll8 ; CHECK: larl [[REGISTER:%r[1-5]+]], {{.*}}
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/
DI286-32.s9 larl 3809469200(%edx,%eax,4), %eax label
13 larl 485498096, %eax label
17 larl 485498096(%edx,%eax,4), %eax label
21 larl 485498096(%edx), %eax label
25 larl 64(%edx,%eax), %eax label
29 larl %eax, %eax label
33 larl (%edx), %eax label
DI286-64.s9 larl 485498096, %r13d label
13 larl 64(%rdx), %r13d label
17 larl 64(%rdx,%rax,4), %r13d label
21 larl -64(%rdx,%rax,4), %r13d label
25 larl 64(%rdx,%rax), %r13d label
29 larl %r13d, %r13d label
33 larl (%rdx), %r13d label
/external/llvm/test/MC/SystemZ/
Dfixups.s7 # CHECK: larl %r14, target # encoding: [0xc0,0xe0,A,A,A,A]
11 larl %r14, target
13 # CHECK: larl %r14, target@GOT # encoding: [0xc0,0xe0,A,A,A,A]
17 larl %r14, target@got
19 # CHECK: larl %r14, target@INDNTPOFF # encoding: [0xc0,0xe0,A,A,A,A]
23 larl %r14, target@indntpoff
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/SystemZ/
Dfixups.s7 # CHECK: larl %r14, target # encoding: [0xc0,0xe0,A,A,A,A]
11 larl %r14, target
13 # CHECK: larl %r14, target@GOT # encoding: [0xc0,0xe0,A,A,A,A]
17 larl %r14, target@got
19 # CHECK: larl %r14, target@INDNTPOFF # encoding: [0xc0,0xe0,A,A,A,A]
23 larl %r14, target@indntpoff

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