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Searched refs:lcd0_ch1_clk_cfg (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/drivers/video/sunxi/
Dlcdc.c319 CCM_LCD_CH1_CTRL_M(best_m), &ccm->lcd0_ch1_clk_cfg); in lcdc_pll_set()
321 setbits_le32(&ccm->lcd0_ch1_clk_cfg, in lcdc_pll_set()
/external/u-boot/arch/arm/include/asm/arch-sunxi/
Dclock_sun4i.h75 u32 lcd0_ch1_clk_cfg; /* 0x12c */ member
Dclock_sun6i.h88 u32 lcd0_ch1_clk_cfg; /* 0x12c LCD0 CH1 module clock */ member