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Searched refs:ld4 (Results 1 – 25 of 114) sorted by relevance

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/external/u-boot/arch/arm/mach-uniphier/clk/
DMakefile5 obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-early-ld4.o clk-dram-ld4.o dpll-ld4.o
6 obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += clk-early-ld4.o clk-dram-ld4.o dpll-pro4.o
7 obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-early-ld4.o clk-dram-ld4.o dpll-sld8.o
8 obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-early-ld4.o clk-dram-pro5.o dpll-pro5.o
9 obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-early-ld4.o clk-dram-pxs2.o dpll-pxs2.o
10 obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-early-ld4.o clk-dram-pxs2.o dpll-pxs2.o
14 obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-ld4.o pll-ld4.o dpll-tail.o
16 obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-ld4.o pll-ld4.o dpll-tail.o
/external/u-boot/arch/arm/dts/
Duniphier-ld4.dtsi11 compatible = "socionext,uniphier-ld4";
196 compatible = "socionext,uniphier-ld4-mioctrl",
201 compatible = "socionext,uniphier-ld4-mio-clock";
206 compatible = "socionext,uniphier-ld4-mio-reset";
212 compatible = "socionext,uniphier-ld4-perictrl",
217 compatible = "socionext,uniphier-ld4-peri-clock";
222 compatible = "socionext,uniphier-ld4-peri-reset";
305 compatible = "socionext,uniphier-ld4-soc-glue",
310 compatible = "socionext,uniphier-ld4-pinctrl";
315 compatible = "socionext,uniphier-ld4-soc-glue-debug",
[all …]
Duniphier-ld4-ref.dts9 #include "uniphier-ld4.dtsi"
15 compatible = "socionext,uniphier-ld4-ref", "socionext,uniphier-ld4";
/external/u-boot/arch/arm/mach-uniphier/dram/
DMakefile5 obj-$(CONFIG_ARCH_UNIPHIER_LD4) += umc-ld4.o \
6 ddrphy-training.o ddrphy-ld4.o
8 ddrphy-training.o ddrphy-ld4.o
10 ddrphy-training.o ddrphy-ld4.o
/external/llvm/test/Transforms/EarlyCSE/AArch64/
DldstN.ll5 declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0v4i16(<4 x i1…
7 ; Although the store and the ld4 are using the same pointer, the
8 ; data can not be reused because ld4 accesses multiple elements.
12 …%0 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0v4i16(<4 x…
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/EarlyCSE/AArch64/
DldstN.ll6 declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0v4i16(<4 x i1…
8 ; Although the store and the ld4 are using the same pointer, the
9 ; data can not be reused because ld4 accesses multiple elements.
13 …%0 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0v4i16(<4 x…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dneon-simd-ldst-multi-elem.s435 ld4 { v0.16b, v1.16b, v2.16b, v3.16b }, [x0]
436 ld4 { v15.8h, v16.8h, v17.8h, v18.8h }, [x15]
437 ld4 { v31.4s, v0.4s, v1.4s, v2.4s }, [sp]
438 ld4 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
439 ld4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0]
440 ld4 { v15.4h, v16.4h, v17.4h, v18.4h }, [x15]
441 ld4 { v31.2s, v0.2s, v1.2s, v2.2s }, [sp]
450 ld4 { v0.16b-v3.16b }, [x0]
451 ld4 { v15.8h-v18.8h }, [x15]
452 ld4 { v31.4s-v2.4s }, [sp]
[all …]
Darm64-simd-ldst.s289 ld4.8b {v4, v5, v6, v7}, [x19]
290 ld4.16b {v4, v5, v6, v7}, [x19]
291 ld4.4h {v4, v5, v6, v7}, [x19]
292 ld4.8h {v4, v5, v6, v7}, [x19]
293 ld4.2s {v4, v5, v6, v7}, [x19]
294 ld4.4s {v4, v5, v6, v7}, [x19]
295 ld4.2d {v4, v5, v6, v7}, [x19]
306 ; CHECK: ld4.8b { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x02,0x40,0x0c]
307 ; CHECK: ld4.16b { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x02,0x40,0x4c]
308 ; CHECK: ld4.4h { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x06,0x40,0x0c]
[all …]
Dneon-simd-ldst-one-elem.s114 ld4 { v0.b, v1.b, v2.b, v3.b }[9], [x0]
115 ld4 { v15.h, v16.h, v17.h, v18.h }[7], [x15]
116 ld4 { v31.s, v0.s, v1.s, v2.s }[3], [sp]
117 ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0]
275 ld4 { v0.b, v1.b, v2.b, v3.b }[9], [x0], x5
276 ld4 { v15.h, v16.h, v17.h, v18.h }[7], [x15], x7
277 ld4 { v31.s, v0.s, v1.s, v2.s }[3], [sp], #16
278 ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0], #32
Dneon-simd-post-ldst-multi-elem.s176 ld4 { v0.16b, v1.16b, v2.16b, v3.16b }, [x0], x1
177 ld4 { v15.8h, v16.8h, v17.8h, v18.8h }, [x15], x2
178 ld4 { v31.4s, v0.4s, v1.4s, v2.4s }, [sp], #64
179 ld4 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0], #64
180 ld4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3
181 ld4 { v15.4h, v16.4h, v17.4h, v18.4h }, [x15], x4
182 ld4 { v31.2s, v0.2s, v1.2s, v2.2s }, [sp], #32
/external/llvm/test/MC/AArch64/
Dneon-simd-ldst-multi-elem.s435 ld4 { v0.16b, v1.16b, v2.16b, v3.16b }, [x0]
436 ld4 { v15.8h, v16.8h, v17.8h, v18.8h }, [x15]
437 ld4 { v31.4s, v0.4s, v1.4s, v2.4s }, [sp]
438 ld4 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
439 ld4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0]
440 ld4 { v15.4h, v16.4h, v17.4h, v18.4h }, [x15]
441 ld4 { v31.2s, v0.2s, v1.2s, v2.2s }, [sp]
450 ld4 { v0.16b-v3.16b }, [x0]
451 ld4 { v15.8h-v18.8h }, [x15]
452 ld4 { v31.4s-v2.4s }, [sp]
[all …]
Darm64-simd-ldst.s289 ld4.8b {v4, v5, v6, v7}, [x19]
290 ld4.16b {v4, v5, v6, v7}, [x19]
291 ld4.4h {v4, v5, v6, v7}, [x19]
292 ld4.8h {v4, v5, v6, v7}, [x19]
293 ld4.2s {v4, v5, v6, v7}, [x19]
294 ld4.4s {v4, v5, v6, v7}, [x19]
295 ld4.2d {v4, v5, v6, v7}, [x19]
306 ; CHECK: ld4.8b { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x02,0x40,0x0c]
307 ; CHECK: ld4.16b { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x02,0x40,0x4c]
308 ; CHECK: ld4.4h { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x06,0x40,0x0c]
[all …]
Dneon-simd-ldst-one-elem.s114 ld4 { v0.b, v1.b, v2.b, v3.b }[9], [x0]
115 ld4 { v15.h, v16.h, v17.h, v18.h }[7], [x15]
116 ld4 { v31.s, v0.s, v1.s, v2.s }[3], [sp]
117 ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0]
275 ld4 { v0.b, v1.b, v2.b, v3.b }[9], [x0], x5
276 ld4 { v15.h, v16.h, v17.h, v18.h }[7], [x15], x7
277 ld4 { v31.s, v0.s, v1.s, v2.s }[3], [sp], #16
278 ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0], #32
Dneon-simd-post-ldst-multi-elem.s176 ld4 { v0.16b, v1.16b, v2.16b, v3.16b }, [x0], x1
177 ld4 { v15.8h, v16.8h, v17.8h, v18.8h }, [x15], x2
178 ld4 { v31.4s, v0.4s, v1.4s, v2.4s }, [sp], #64
179 ld4 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0], #64
180 ld4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3
181 ld4 { v15.4h, v16.4h, v17.4h, v18.4h }, [x15], x4
182 ld4 { v31.2s, v0.2s, v1.2s, v2.2s }, [sp], #32
/external/u-boot/arch/arm/mach-uniphier/boot-device/
DMakefile5 obj-$(CONFIG_ARCH_UNIPHIER_LD4) += boot-device-ld4.o
6 obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += boot-device-ld4.o
7 obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += boot-device-ld4.o
/external/capstone/suite/MC/AArch64/
Dneon-simd-ldst-multi-elem.s.cs184 0x00,0x00,0x40,0x4c = ld4 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0]
185 0xef,0x05,0x40,0x4c = ld4 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15]
186 0xff,0x0b,0x40,0x4c = ld4 {v31.4s, v0.4s, v1.4s, v2.4s}, [sp]
187 0x00,0x0c,0x40,0x4c = ld4 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0]
188 0x00,0x00,0x40,0x0c = ld4 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0]
189 0xef,0x05,0x40,0x0c = ld4 {v15.4h, v16.4h, v17.4h, v18.4h}, [x15]
190 0xff,0x0b,0x40,0x0c = ld4 {v31.2s, v0.2s, v1.2s, v2.2s}, [sp]
191 0x00,0x00,0x40,0x4c = ld4 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0]
192 0xef,0x05,0x40,0x4c = ld4 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15]
193 0xff,0x0b,0x40,0x4c = ld4 {v31.4s, v0.4s, v1.4s, v2.4s}, [sp]
[all …]
Dneon-simd-ldst-one-elem.s.cs46 0x00,0x24,0x60,0x4d = ld4 {v0.b, v1.b, v2.b, v3.b}[9], [x0]
47 0xef,0x79,0x60,0x4d = ld4 {v15.h, v16.h, v17.h, v18.h}[7], [x15]
48 0xff,0xb3,0x60,0x4d = ld4 {v31.s, v0.s, v1.s, v2.s}[3], [sp]
49 0x00,0xa4,0x60,0x4d = ld4 {v0.d, v1.d, v2.d, v3.d}[1], [x0]
110 0x00,0x24,0xe5,0x4d = ld4 {v0.b, v1.b, v2.b, v3.b}[9], [x0], x5
111 0xef,0x79,0xe7,0x4d = ld4 {v15.h, v16.h, v17.h, v18.h}[7], [x15], x7
112 0xff,0xb3,0xff,0x4d = ld4 {v31.s, v0.s, v1.s, v2.s}[3], [sp], #16
113 0x00,0xa4,0xff,0x4d = ld4 {v0.d, v1.d, v2.d, v3.d}[1], [x0], #32
Dneon-simd-post-ldst-multi-elem.s.cs48 0x00,0x00,0xc1,0x4c = ld4 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0], x1
49 0xef,0x05,0xc2,0x4c = ld4 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15], x2
50 0xff,0x0b,0xdf,0x4c = ld4 {v31.4s, v0.4s, v1.4s, v2.4s}, [sp], #64
51 0x00,0x0c,0xdf,0x4c = ld4 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0], #64
52 0x00,0x00,0xc3,0x0c = ld4 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0], x3
53 0xef,0x05,0xc4,0x0c = ld4 {v15.4h, v16.4h, v17.4h, v18.4h}, [x15], x4
54 0xff,0x0b,0xdf,0x0c = ld4 {v31.2s, v0.2s, v1.2s, v2.2s}, [sp], #32
/external/libavc/common/armv8/
Dih264_deblk_chroma_av8.s198 ld4 {v0.h, v1.h, v2.h, v3.h}[0], [x0], x1
199 ld4 {v0.h, v1.h, v2.h, v3.h}[1], [x0], x1
200 ld4 {v0.h, v1.h, v2.h, v3.h}[2], [x0], x1
201 ld4 {v0.h, v1.h, v2.h, v3.h}[3], [x0], x1
203 ld4 {v4.h, v5.h, v6.h, v7.h}[0], [x0], x1
204 ld4 {v4.h, v5.h, v6.h, v7.h}[1], [x0], x1
205 ld4 {v4.h, v5.h, v6.h, v7.h}[2], [x0], x1
206 ld4 {v4.h, v5.h, v6.h, v7.h}[3], [x0], x1
479 ld4 {v0.h, v1.h, v2.h, v3.h}[0], [x0], x1
480 ld4 {v0.h, v1.h, v2.h, v3.h}[1], [x0], x1
[all …]
/external/u-boot/arch/arm/mach-uniphier/bcu/
DMakefile3 obj-$(CONFIG_ARCH_UNIPHIER_LD4) += bcu-ld4.o
4 obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += bcu-ld4.o
/external/u-boot/arch/arm/mach-uniphier/sbc/
DMakefile5 obj-$(CONFIG_ARCH_UNIPHIER_LD4) += sbc-ld4.o
6 obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += sbc-ld4.o
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-indexed-vector-ldst.ll1121 ;CHECK: ld4.16b { v0, v1, v2, v3 }, [x0], #64
1122 …%ld4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0i8(…
1125 ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld4
1130 ;CHECK: ld4.16b { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
1131 …%ld4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0i8(…
1134 ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld4
1137 declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0i8(i8*)
1142 ;CHECK: ld4.8b { v0, v1, v2, v3 }, [x0], #32
1143 …%ld4 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0i8(i8* %…
1146 ret { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %ld4
[all …]
Darm64-neon-vector-list-spill.ll49 ; CHECK: ld4 { v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, v{{[0-9]+}}.4h }, [{{x[0-9]+|sp}}]
53 …%vld = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0i16…
109 ; CHECK: ld4 { v{{[0-9]+}}.16b, v{{[0-9]+}}.16b, v{{[0-9]+}}.16b, v{{[0-9]+}}.16b }, [{{x[0-9]+|sp}…
113 …%vld = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0i8(…
129 declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0i16(i16*)
132 declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0i8(i8*)
/external/llvm/test/CodeGen/AArch64/
Darm64-indexed-vector-ldst.ll1121 ;CHECK: ld4.16b { v0, v1, v2, v3 }, [x0], #64
1122 …%ld4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0i8(…
1125 ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld4
1130 ;CHECK: ld4.16b { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
1131 …%ld4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0i8(…
1134 ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld4
1137 declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0i8(i8*)
1142 ;CHECK: ld4.8b { v0, v1, v2, v3 }, [x0], #32
1143 …%ld4 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0i8(i8* %…
1146 ret { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %ld4
[all …]
Darm64-neon-vector-list-spill.ll49 ; CHECK: ld4 { v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, v{{[0-9]+}}.4h }, [{{x[0-9]+|sp}}]
53 …%vld = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0i16…
109 ; CHECK: ld4 { v{{[0-9]+}}.16b, v{{[0-9]+}}.16b, v{{[0-9]+}}.16b, v{{[0-9]+}}.16b }, [{{x[0-9]+|sp}…
113 …%vld = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0i8(…
129 declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0i16(i16*)
132 declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0i8(i8*)

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