/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | load-store-acquire-release-v8.s | 32 ldah r12, [r9] 35 @ CHECK: ldah r12, [r9] @ encoding: [0x9f,0xcc,0xf9,0xe1]
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D | load-store-acquire-release-v8-thumb.s | 32 ldah r12, [r9] 35 @ CHECK: ldah r12, [r9] @ encoding: [0xd9,0xe8,0x9f,0xcf]
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D | thumbv8m.s | 106 ldah r1, [r2] label
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/external/llvm/test/MC/ARM/ |
D | load-store-acquire-release-v8.s | 32 ldah r12, [r9] 35 @ CHECK: ldah r12, [r9] @ encoding: [0x9f,0xcc,0xf9,0xe1]
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D | load-store-acquire-release-v8-thumb.s | 32 ldah r12, [r9] 35 @ CHECK: ldah r12, [r9] @ encoding: [0xd9,0xe8,0x9f,0xcf]
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D | thumbv8m.s | 106 ldah r1, [r2] label
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/external/capstone/suite/MC/ARM/ |
D | load-store-acquire-release-v8-thumb.s.cs | 12 0xd9,0xe8,0x9f,0xcf = ldah r12, [r9]
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D | load-store-acquire-release-v8.s.cs | 12 0x9f,0xcc,0xf9,0xe1 = ldah r12, [r9]
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/external/swiftshader/third_party/LLVM/test/CodeGen/Alpha/ |
D | private.ll | 7 ; RUN: grep ldah.*\\\$baz %t
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/external/llvm/test/MC/Disassembler/ARM/ |
D | load-store-acquire-release-v8-thumb.txt | 26 # CHECK: ldah r12, [r9] @ encoding: [0xd9,0xe8,0x9f,0xcf]
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D | load-store-acquire-release-v8.txt | 25 # CHECK: ldah r12, [r9] @ encoding: [0x9f,0xcc,0xf9,0xe1]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | load-store-acquire-release-v8-thumb.txt | 26 # CHECK: ldah r12, [r9] @ encoding: [0xd9,0xe8,0x9f,0xcf]
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D | load-store-acquire-release-v8.txt | 25 # CHECK: ldah r12, [r9] @ encoding: [0x9f,0xcc,0xf9,0xe1]
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/external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
D | AlphaInstrInfo.td | 60 def LH16 : SDNodeXForm<imm, [{ //ldah part of constant (or more if too big) 473 def LDAH : MForm<0x09, 0, "ldah $RA,$DISP($RB)", 475 def LDAHr : MForm<0x09, 0, "ldah $RA,$DISP($RB)\t\t!gprelhigh", 577 def LDAHg : MForm<0x09, 1, "ldah $RA,0($RB)\t\t!gpdisp!$NUM", [], s_lda>; //Load address
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 2302 void ldah(Condition cond, Register rt, const MemOperand& operand); 2303 void ldah(Register rt, const MemOperand& operand) { ldah(al, rt, operand); } in ldah() function
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D | disasm-aarch32.h | 786 void ldah(Condition cond, Register rt, const MemOperand& operand);
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D | disasm-aarch32.cc | 1622 void Disassembler::ldah(Condition cond, in ldah() function in vixl::aarch32::Disassembler 10489 ldah(CurrentCond(), in DecodeT32() 60300 ldah(condition, in DecodeA32()
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D | assembler-aarch32.cc | 4747 void Assembler::ldah(Condition cond, Register rt, const MemOperand& operand) { in ldah() function in vixl::aarch32::Assembler 4770 Delegate(kLdah, &Assembler::ldah, cond, rt, operand); in ldah()
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D | macro-assembler-aarch32.h | 1937 ldah(cond, rt, operand); in Ldah()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 1430 (ins addr_offset_none:$addr), "ldah", "\t$Rt, $addr", []>,
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D | ARMInstrInfo.td | 2656 NoItinerary, "ldah", "\t$Rt, $addr", []>;
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 1437 (ins addr_offset_none:$addr), "ldah", "\t$Rt, $addr", []>;
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D | ARMInstrInfo.td | 2546 NoItinerary, "ldah", "\t$Rt, $addr", []>;
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
D | ARMGenAsmMatcher.inc | 7741 "ldab\005ldaex\006ldaexb\006ldaexd\006ldaexh\004ldah\003ldc\004ldc2\005l" 8139 …{ 400 /* ldah */, ARM::t2LDAH, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsThumb|Featu… 8140 …{ 400 /* ldah */, ARM::LDAH, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM|Feature_H…
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