/external/llvm/test/CodeGen/AArch64/ |
D | cmpxchg-O0.ll | 21 ; CHECK: ldaxrh [[OLD:w[0-9]+]], [x0]
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D | atomic-ops.ll | 43 ; ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]] 442 ; ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]] 622 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]] 719 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]] 914 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
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D | arm64-ldxr-stxr.ll | 188 ; CHECK: ldaxrh w[[LOADVAL:[0-9]+]], [x0]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | cmpxchg-O0.ll | 23 ; CHECK: ldaxrh [[OLD:w[0-9]+]], [x0]
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D | atomic-ops.ll | 43 ; ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]] 442 ; ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]] 621 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]] 718 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]] 913 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
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D | arm64-ldxr-stxr.ll | 188 ; CHECK: ldaxrh w[[LOADVAL:[0-9]+]], [x0]
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/external/v8/src/compiler/arm64/ |
D | code-generator-arm64.cc | 1621 ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxrh, stlxrh, Register32); in AssembleArchInstruction() 1626 ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxrh, stlxrh, Register32); in AssembleArchInstruction() 1646 ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldaxrh, stlxrh, UXTH, in AssembleArchInstruction() 1652 ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldaxrh, stlxrh, UXTH, in AssembleArchInstruction() 1672 ASSEMBLE_ATOMIC_BINOP(ldaxrh, stlxrh, inst, Register32); \ in AssembleArchInstruction() 1677 ASSEMBLE_ATOMIC_BINOP(ldaxrh, stlxrh, inst, Register32); \ in AssembleArchInstruction()
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/external/llvm/test/MC/AArch64/ |
D | arm64-memory.s | 513 ldaxrh w2, [x4] 520 ; CHECK: ldaxrh w2, [x4] ; encoding: [0x82,0xfc,0x5f,0x48]
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D | basic-a64-instructions.s | 2295 ldaxrh w20, [sp]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | arm64-memory.s | 513 ldaxrh w2, [x4] 520 ; CHECK: ldaxrh w2, [x4] ; encoding: [0x82,0xfc,0x5f,0x48]
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D | basic-a64-instructions.s | 2278 ldaxrh w20, [sp]
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/external/vixl/ |
D | README.md | 125 `stlxrh`, `stlxr`, `ldaxrb`, `ldaxrh`, `ldaxr`, `stlxp`, `ldaxp`, `stlrb`,
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-memory.txt | 501 # CHECK: ldaxrh w2, [x4]
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-memory.txt | 501 # CHECK: ldaxrh w2, [x4]
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/external/v8/src/arm64/ |
D | macro-assembler-arm64.h | 90 V(Ldaxrh, ldaxrh) \
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D | assembler-arm64.h | 1665 void ldaxrh(const Register& rt, const Register& rn);
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/external/vixl/test/aarch64/ |
D | test-disasm-aarch64.cc | 1920 COMPARE(ldaxrh(w15, MemOperand(x16)), "ldaxrh w15, [x16]"); in TEST() 1921 COMPARE(ldaxrh(w17, MemOperand(sp)), "ldaxrh w17, [sp]"); in TEST() 1922 COMPARE(ldaxrh(x18, MemOperand(x19)), "ldaxrh w18, [x19]"); in TEST() 1923 COMPARE(ldaxrh(x20, MemOperand(sp)), "ldaxrh w20, [sp]"); in TEST()
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D | test-trace-aarch64.cc | 163 __ ldaxrh(w17, MemOperand(x0)); in GenerateTestSequenceBase() local 164 __ ldaxrh(x18, MemOperand(x0)); in GenerateTestSequenceBase() local
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/external/capstone/suite/MC/AArch64/ |
D | basic-a64-instructions.s.cs | 893 0xf4,0xff,0x5f,0x48 = ldaxrh w20, [sp]
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 1358 void ldaxrh(const Register& rt, const MemOperand& src);
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D | macro-assembler-aarch64.h | 1660 ldaxrh(rt, src); in Ldaxrh()
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/external/vixl/test/test-trace-reference/ |
D | log-disasm | 110 0x~~~~~~~~~~~~~~~~ 485ffc11 ldaxrh w17, [x0] 111 0x~~~~~~~~~~~~~~~~ 485ffc12 ldaxrh w18, [x0]
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D | log-disasm-colour | 110 0x~~~~~~~~~~~~~~~~ 485ffc11 ldaxrh w17, [x0] 111 0x~~~~~~~~~~~~~~~~ 485ffc12 ldaxrh w18, [x0]
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D | log-cpufeatures-custom | 110 0x~~~~~~~~~~~~~~~~ 485ffc11 ldaxrh w17, [x0] 111 0x~~~~~~~~~~~~~~~~ 485ffc12 ldaxrh w18, [x0]
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 543 void ldaxrh(const Register& rt, const MemOperand& src)
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