/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | arm-load-store-multiple-deprecated.s | 163 .global ldmda symbol 164 .type ldmda,%function 165 ldmda: label 166 ldmda r0!, {r1, sp} 168 ldmda r0!, {sp} 170 ldmda r0!, {r1, lr, pc} 172 ldmda r0!, {lr, pc}
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D | basic-arm-instructions.s | 1163 ldmda r2, {r1,r3-r6,sp} 1170 ldmda r2!, {r1,r3-r6,sp} 1180 @ CHECK: ldmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe8] 1186 @ CHECK: ldmda r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x32,0xe8]
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D | diagnostics.s | 540 ldmda r2!, {r2, r3}
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/external/llvm/test/MC/ARM/ |
D | arm-load-store-multiple-deprecated.s | 163 .global ldmda symbol 164 .type ldmda,%function 165 ldmda: label 166 ldmda r0!, {r1, sp} 168 ldmda r0!, {sp} 170 ldmda r0!, {r1, lr, pc} 172 ldmda r0!, {lr, pc}
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D | diagnostics.s | 462 ldmda r2!, {r2, r3}
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D | basic-arm-instructions.s | 1161 ldmda r2, {r1,r3-r6,sp} 1168 ldmda r2!, {r1,r3-r6,sp} 1178 @ CHECK: ldmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe8] 1184 @ CHECK: ldmda r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x32,0xe8]
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/external/capstone/suite/MC/ARM/ |
D | basic-arm-instructions.s.cs | 319 0x7a,0x20,0x12,0xe8 = ldmda r2, {r1, r3, r4, r5, r6, sp} 324 0x7a,0x20,0x32,0xe8 = ldmda r2!, {r1, r3, r4, r5, r6, sp}
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-arm-instructions.s | 737 ldmda r2, {r1,r3-r6,sp} 744 ldmda r2!, {r1,r3-r6,sp} 750 @ CHECK: ldmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe8] 756 @ CHECK: ldmda r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x32,0xe8]
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 586 # CHECK: ldmda r2, {r1, r3, r4, r5, r6, sp} 592 # CHECK: ldmda r2!, {r1, r3, r4, r5, r6, sp}
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 667 # CHECK: ldmda r2, {r1, r3, r4, r5, r6, sp} 673 # CHECK: ldmda r2!, {r1, r3, r4, r5, r6, sp}
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/external/llvm/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 667 # CHECK: ldmda r2, {r1, r3, r4, r5, r6, sp} 673 # CHECK: ldmda r2!, {r1, r3, r4, r5, r6, sp}
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 2326 void ldmda(Condition cond, 2330 void ldmda(Register rn, WriteBack write_back, RegisterList registers) { in ldmda() function 2331 ldmda(al, rn, write_back, registers); in ldmda()
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D | disasm-aarch32.h | 794 void ldmda(Condition cond,
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D | assembler-aarch32.cc | 4822 void Assembler::ldmda(Condition cond, in ldmda() function in vixl::aarch32::Assembler 4837 Delegate(kLdmda, &Assembler::ldmda, cond, rn, write_back, registers); in ldmda()
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D | macro-assembler-aarch32.h | 1967 ldmda(cond, rn, write_back, registers); in Ldmda()
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D | disasm-aarch32.cc | 1640 void Disassembler::ldmda(Condition cond, in ldmda() function in vixl::aarch32::Disassembler 64618 ldmda(condition, Register(rn), write_back, registers); in DecodeA32()
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
D | ARMGenAsmMatcher.inc | 7742 "dc2l\004ldcl\003ldm\005ldmda\005ldmdb\005ldmib\003ldr\004ldrb\005ldrbt\004" 8183 …{ 429 /* ldmda */, ARM::LDMDA, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsARM, { MCK_Cond… 8184 …{ 429 /* ldmda */, ARM::LDMDA_UPD, Convert__Reg1_1__Tie0_2_2__CondCode2_0__RegList1_3, Feature_IsA… 8185 …{ 429 /* ldmda */, ARM::sysLDMDA, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsARM, { MCK_C… 8186 …{ 429 /* ldmda */, ARM::sysLDMDA_UPD, Convert__Reg1_1__Tie0_2_2__CondCode2_0__RegList1_3, Feature_…
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