/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
D | atomic-cmp.ll | 7 ; ARM: ldrexb 11 ; T2: ldrexb
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | atomic-cmp.ll | 7 ; ARM: ldrexb 13 ; T2: ldrexb
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D | atomic-cmpxchg.ll | 35 ; CHECK-ARMV6-NEXT: ldrexb [[LD:r[0-9]+]], [r0] 64 ; CHECK-ARMV7-NEXT: ldrexb [[SUCCESS]], [r0] 82 ; CHECK-THUMBV7-NEXT: ldrexb [[LD:r[0-9]+]], [r0]
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D | cmpxchg-idioms.ll | 44 ; CHECK: ldrexb [[LOADED:r[0-9]+]], [r0] 54 ; CHECK: ldrexb [[LOADED]], [r0]
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D | cmpxchg-O0.ll | 13 ; CHECK: ldrexb [[OLD:r[0-9]+]], [r0]
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D | ldstrex.ll | 37 ; CHECK: ldrexb r0, [r0]
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D | atomic-ops-v8.ll | 116 ; CHECK: ldrexb r[[OLD:[0-9]+]], [r[[ADDR]]] 212 ; CHECK: ldrexb r[[OLD:[0-9]+]], [r[[ADDR]]] 500 ; CHECK: ldrexb r[[OLD:[0-9]+]], [r[[ADDR]]] 815 ; CHECK: ldrexb r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
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/external/llvm/test/CodeGen/ARM/ |
D | atomic-cmp.ll | 7 ; ARM: ldrexb 13 ; T2: ldrexb
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D | atomic-cmpxchg.ll | 40 ; CHECK-ARMV6-NEXT: ldrexb [[LD:r[0-9]+]], [r0] 68 ; CHECK-ARMV7-NEXT: ldrexb [[LD:r[0-9]+]], [r0] 94 ; CHECK-THUMBV7-NEXT: ldrexb [[LD:r[0-9]+]], [r0]
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D | cmpxchg-idioms.ll | 44 ; CHECK: ldrexb [[LOADED:r[0-9]+]], [r0] 54 ; CHECK: ldrexb [[LOADED]], [r0]
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D | cmpxchg-O0.ll | 13 ; CHECK: ldrexb [[OLD:r[0-9]+]], [r0]
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D | ldstrex.ll | 37 ; CHECK: ldrexb r0, [r0]
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D | atomic-ops-v8.ll | 116 ; CHECK: ldrexb r[[OLD:[0-9]+]], [r[[ADDR]]] 212 ; CHECK: ldrexb r[[OLD:[0-9]+]], [r[[ADDR]]] 500 ; CHECK: ldrexb r[[OLD:[0-9]+]], [r[[ADDR]]] 815 ; CHECK: ldrexb r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
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/external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/ |
D | ldrex-strex.ll | 49 ; ***** Example of ldrexb ***** 50 ; ASM: ldrexb r1, [r2]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | thumbv8m.s | 67 ldrexb r1, [r2] label
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D | basic-thumb2-instructions.s | 1070 ldrexb r5, [r7] 1077 @ CHECK: ldrexb r5, [r7] @ encoding: [0xd7,0xe8,0x4f,0x5f]
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/external/llvm/test/MC/ARM/ |
D | thumbv8m.s | 67 ldrexb r1, [r2] label
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/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
D | nacl-atomic-intrinsics.ll | 348 ; ARM32: ldrexb 626 ; ARM32: ldrexb 794 ; ARM32: ldrexb 836 ; ARM32: ldrexb r{{[0-9]+}}, {{[[]}}[[PTR]]{{[]]}} 1075 ; ARM32: ldrexb 1245 ; ARM32: ldrexb 1411 ; ARM32: ldrexb 1569 ; ARM32: ldrexb [[V:r[0-9]+]], {{[[]}}[[A:r[0-9]+]]{{[]]}}
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/external/v8/src/compiler/arm/ |
D | code-generator-arm.cc | 2683 ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldrexb, strexb); in AssembleArchInstruction() 2688 ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldrexb, strexb); in AssembleArchInstruction() 2708 ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldrexb, strexb, in AssembleArchInstruction() 2716 ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldrexb, strexb, in AssembleArchInstruction() 2744 ASSEMBLE_ATOMIC_BINOP(ldrexb, strexb, inst); \ in AssembleArchInstruction() 2749 ASSEMBLE_ATOMIC_BINOP(ldrexb, strexb, inst); \ in AssembleArchInstruction()
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/external/capstone/suite/MC/ARM/ |
D | basic-arm-instructions.s.cs | 328 0x9f,0x3f,0xd4,0xe1 = ldrexb r3, [r4]
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D | basic-thumb2-instructions.s.cs | 333 0xd7,0xe8,0x4f,0x5f = ldrexb r5, [r7]
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/external/v8/src/arm/ |
D | assembler-arm.h | 929 void ldrexb(Register dst, Register src, Condition cond = al);
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-arm-instructions.s | 763 ldrexb r3, [r4] 768 @ CHECK: ldrexb r3, [r4] @ encoding: [0x9f,0x3f,0xd4,0xe1]
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D | basic-thumb2-instructions.s | 753 ldrexb r5, [r7] 760 @ CHECK: ldrexb r5, [r7] @ encoding: [0xd7,0xe8,0x4f,0x5f]
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 2465 void ldrexb(Condition cond, Register rt, const MemOperand& operand); 2466 void ldrexb(Register rt, const MemOperand& operand) { in ldrexb() function 2467 ldrexb(al, rt, operand); in ldrexb()
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