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Searched refs:mask_results_dq_reg_map (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/drivers/ddr/marvell/a38x/
Dddr3_training_pbs.c49 u16 *mask_results_dq_reg_map = ddr3_tip_get_mask_results_dq_reg(); in ddr3_tip_pbs() local
102 mask_results_dq_reg_map[ in ddr3_tip_pbs()
220 mask_results_dq_reg_map[ in ddr3_tip_pbs()
409 mask_results_dq_reg_map[ in ddr3_tip_pbs()
530 mask_results_dq_reg_map in ddr3_tip_pbs()
633 mask_results_dq_reg_map in ddr3_tip_pbs()
Dddr3_training_leveling.c437 u16 *mask_results_dq_reg_map = ddr3_tip_get_mask_results_dq_reg(); in ddr3_tip_dynamic_per_bit_read_leveling() local
615 mask_results_dq_reg_map in ddr3_tip_dynamic_per_bit_read_leveling()
631 mask_results_dq_reg_map in ddr3_tip_dynamic_per_bit_read_leveling()
1490 u16 *mask_results_dq_reg_map = ddr3_tip_get_mask_results_dq_reg(); in ddr3_tip_dynamic_write_leveling_seq() local
1523 mask_results_dq_reg_map[dq_id], 0x1 << 24, in ddr3_tip_dynamic_write_leveling_seq()
1557 u16 *mask_results_dq_reg_map = ddr3_tip_get_mask_results_dq_reg(); in ddr3_tip_dynamic_read_leveling_seq() local
1565 mask_results_dq_reg_map[dq_id], 0x1 << 24, in ddr3_tip_dynamic_read_leveling_seq()
1595 u16 *mask_results_dq_reg_map = ddr3_tip_get_mask_results_dq_reg(); in ddr3_tip_dynamic_per_bit_read_leveling_seq() local
1603 mask_results_dq_reg_map[dq_id], 0x1 << 24, in ddr3_tip_dynamic_per_bit_read_leveling_seq()
1620 mask_results_dq_reg_map[dq_id], 0x0 << 24, in ddr3_tip_dynamic_per_bit_read_leveling_seq()
Dddr3_training_ip_engine.c20 u16 mask_results_dq_reg_map[] = { variable
354 u16 *mask_results_dq_reg_map = ddr3_tip_get_mask_results_dq_reg(); in ddr3_tip_ip_training() local
500 mask_results_dq_reg_map[index_cnt], 0, in ddr3_tip_ip_training()
514 mask_results_dq_reg_map in ddr3_tip_ip_training()
539 mask_results_dq_reg_map[index_cnt], in ddr3_tip_ip_training()
706 u16 *mask_results_dq_reg_map = ddr3_tip_get_mask_results_dq_reg(); in ddr3_tip_read_training_result() local
741 reg_addr = mask_results_dq_reg_map; in ddr3_tip_read_training_result()
1623 return mask_results_dq_reg_map; in ddr3_tip_get_mask_results_dq_reg()
Dddr3_init.h138 extern u16 mask_results_dq_reg_map[];