/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
D | intrinsics.ll | 16 ; CHECK: mcrr2 17 tail call void @llvm.arm.mcrr2(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind 29 declare void @llvm.arm.mcrr2(i32, i32, i32, i32, i32) nounwind
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/external/llvm/test/CodeGen/ARM/ |
D | intrinsics-coprocessor.ll | 16 ; CHECK: mcrr2 p7, #1, r{{[0-9]+}}, r{{[0-9]+}}, c1 17 tail call void @llvm.arm.mcrr2(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind 65 declare void @llvm.arm.mcrr2(i32, i32, i32, i32, i32) nounwind
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | intrinsics-coprocessor.ll | 15 ; CHECK: mcrr2 p7, #1, r{{[0-9]+}}, r{{[0-9]+}}, c1 16 tail call void @llvm.arm.mcrr2(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind 64 declare void @llvm.arm.mcrr2(i32, i32, i32, i32, i32) nounwind
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | invalid-armv8.txt | 84 # CHECK-V7: mcrr2 89 # CHECK-V7: mcrr2 94 # CHECK-V7: mcrr2
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D | invalid-thumbv8.txt | 84 # CHECK-V7: mcrr2 89 # CHECK-V7: mcrr2 94 # CHECK-V7: mcrr2
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D | basic-arm-instructions.txt | 721 # CHECK: mcrr2 p7, #15, r5, r4, c1
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/ |
D | intrinsics-coprocessor.ll | 14 ; CHECK: mcrr2 p7, #1, r{{[0-9]+}}, r{{[0-9]+}}, c1 15 tail call void @llvm.arm.mcrr2(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind 79 declare void @llvm.arm.mcrr2(i32, i32, i32, i32, i32) nounwind
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/external/llvm/test/MC/Disassembler/ARM/ |
D | invalid-armv8.txt | 84 # CHECK-V7: mcrr2 89 # CHECK-V7: mcrr2 94 # CHECK-V7: mcrr2
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D | invalid-thumbv8.txt | 84 # CHECK-V7: mcrr2 89 # CHECK-V7: mcrr2 94 # CHECK-V7: mcrr2
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D | thumb2.txt | 1033 # CHECK: mcrr2 p7, #15, r5, r4, c1
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D | basic-arm-instructions.txt | 721 # CHECK: mcrr2 p7, #15, r5, r4, c1
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/external/clang/test/CodeGen/ |
D | builtins-arm.c | 191 void mcrr2(uint64_t a) { in mcrr2() function
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | diagnostics.s | 84 mcrr2 p7, #16, r5, r4, c1
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D | basic-arm-instructions.s | 802 mcrr2 p7, #15, r5, r4, c1 805 @ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xfc]
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D | basic-thumb2-instructions.s | 1078 mcrr2 p7, #15, r5, r4, c1 1081 @ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0x44,0xfc,0xf1,0x57]
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/external/llvm/test/MC/ARM/ |
D | diagnostics.s | 146 mcrr2 p7, #16, r5, r4, c1
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D | basic-arm-instructions.s | 1256 mcrr2 p7, #15, r5, r4, c1 1259 @ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xfc]
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D | basic-thumb2-instructions.s | 1391 mcrr2 p7, #15, r5, r4, c1 1394 @ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0x44,0xfc,0xf1,0x57]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | diagnostics.s | 162 mcrr2 p7, #16, r5, r4, c1
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D | basic-thumb2-instructions.s | 1423 mcrr2 p7, #15, r5, r4, c1 1426 @ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0x44,0xfc,0xf1,0x57]
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D | basic-arm-instructions.s | 1258 mcrr2 p7, #15, r5, r4, c1 1261 @ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xfc]
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/external/capstone/suite/MC/ARM/ |
D | basic-arm-instructions.s.cs | 346 0xf1,0x57,0x44,0xfc = mcrr2 p7, #15, r5, r4, c1
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D | basic-thumb2-instructions.s.cs | 432 0x44,0xfc,0xf1,0x57 = mcrr2 p7, #15, r5, r4, c1
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 640 # CHECK: mcrr2 p7, #15, r5, r4, c1
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D | thumb2.txt | 916 # CHECK: mcrr2 p7, #15, r5, r4, c1
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