Searched refs:mem_op (Results 1 – 12 of 12) sorted by relevance
/external/u-boot/drivers/mtd/ |
D | altera_qspi.c | 43 u32 mem_op; member 169 writel(sect, ®s->mem_op); in altera_qspi_erase() 262 u32 mem_op; in altera_qspi_lock() local 281 mem_op = (sr_tb << 12) | (sr_bp << 8); in altera_qspi_lock() 282 mem_op |= QUADSPI_MEM_OP_SECTOR_PROTECT; in altera_qspi_lock() 283 debug("lock %08x\n", mem_op); in altera_qspi_lock() 284 writel(mem_op, ®s->mem_op); in altera_qspi_lock() 294 u32 mem_op; in altera_qspi_unlock() local 296 mem_op = QUADSPI_MEM_OP_SECTOR_PROTECT; in altera_qspi_unlock() 297 debug("unlock %08x\n", mem_op); in altera_qspi_unlock() [all …]
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/external/vixl/test/aarch64/ |
D | test-abi.cc | 78 #define CHECK_NEXT_PARAMETER_MEM(type, mem_op, size) \ in TEST() argument 80 expected = GenericOperand(mem_op, size); \ in TEST()
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/external/kernel-headers/original/uapi/linux/ |
D | perf_event.h | 1003 __u64 mem_op:5, /* type of opcode */ member 1026 mem_op:5; /* type of opcode */ member
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/external/vixl/src/aarch64/ |
D | macro-assembler-aarch64.cc | 1703 const MemOperand& mem_op) { in ComputeAddress() argument 1705 VIXL_ASSERT(mem_op.GetAddrMode() == Offset); in ComputeAddress() 1706 Register base = mem_op.GetBaseRegister(); in ComputeAddress() 1707 if (mem_op.IsImmediateOffset()) { in ComputeAddress() 1708 Add(dst, base, mem_op.GetOffset()); in ComputeAddress() 1710 VIXL_ASSERT(mem_op.IsRegisterOffset()); in ComputeAddress() 1711 Register reg_offset = mem_op.GetRegisterOffset(); in ComputeAddress() 1712 Shift shift = mem_op.GetShift(); in ComputeAddress() 1713 Extend extend = mem_op.GetExtend(); in ComputeAddress() 1716 Add(dst, base, Operand(reg_offset, extend, mem_op.GetShiftAmount())); in ComputeAddress() [all …]
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D | operands-aarch64.cc | 506 GenericOperand::GenericOperand(const MemOperand& mem_op, size_t mem_op_size) in GenericOperand() argument 507 : cpu_register_(NoReg), mem_op_(mem_op), mem_op_size_(mem_op_size) { in GenericOperand()
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D | simulator-aarch64.cc | 485 uint64_t Simulator::ComputeMemOperandAddress(const MemOperand& mem_op) const { in ComputeMemOperandAddress() 486 VIXL_ASSERT(mem_op.IsValid()); in ComputeMemOperandAddress() 487 int64_t base = ReadRegister<int64_t>(mem_op.GetBaseRegister()); in ComputeMemOperandAddress() 488 if (mem_op.IsImmediateOffset()) { in ComputeMemOperandAddress() 489 return base + mem_op.GetOffset(); in ComputeMemOperandAddress() 491 VIXL_ASSERT(mem_op.GetRegisterOffset().IsValid()); in ComputeMemOperandAddress() 492 int64_t offset = ReadRegister<int64_t>(mem_op.GetRegisterOffset()); in ComputeMemOperandAddress() 493 unsigned shift_amount = mem_op.GetShiftAmount(); in ComputeMemOperandAddress() 494 if (mem_op.GetShift() != NO_SHIFT) { in ComputeMemOperandAddress() 495 offset = ShiftOperand(kXRegSize, offset, mem_op.GetShift(), shift_amount); in ComputeMemOperandAddress() [all …]
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D | operands-aarch64.h | 931 GenericOperand(const MemOperand& mem_op,
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D | simulator-aarch64.h | 1249 uint64_t ComputeMemOperandAddress(const MemOperand& mem_op) const;
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D | macro-assembler-aarch64.h | 727 void ComputeAddress(const Register& dst, const MemOperand& mem_op);
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/external/mesa3d/src/gallium/drivers/r600/sb/ |
D | sb_bc_builder.cpp | 567 unsigned mem_op = 4; in build_fetch_gds() local 571 mem_op = 5; in build_fetch_gds() 577 .MEM_OP(mem_op) in build_fetch_gds()
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D | sb_bc_decoder.cpp | 414 unsigned mem_op = (dw0 >> 8) & 0x7; in decode_fetch() local 416 if (mem_op == 4) { in decode_fetch() 422 } else if (mem_op == 5) in decode_fetch()
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/external/perf_data_converter/src/quipper/kernel/ |
D | perf_event.h | 819 __u64 mem_op : 5, /* type of opcode */ member
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