Searched refs:memw (Results 1 – 25 of 200) sorted by relevance
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Hexagon/ |
| D | parse-pound-hi.s | 3 memw(gp+#hi_htc_version) = r3
4 #CHECK: 4880c300 { memw(gp+#0) = r3 }
5 memw(gp+#HI) = r3
6 #CHECK: 4880c300 { memw(gp+#0) = r3 }
7 r3 = memw(gp+#HI)
8 #CHECK: 4980c003 { r3 = memw(gp+#0) }
9 memw(gp+#HI_x) = r3
10 #CHECK: 4880c300 { memw(gp+#0) = r3 }
11 r3 = memw(gp+#HI_x)
12 #CHECK: 4980c003 { r3 = memw(gp+#0) }
[all …]
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| D | asmMap.s | 5 #CHECK: 3c56c000 { memw(r22+#0) = #0
6 memw(r22)=#0
38 #CHECK: 4583c01d { if (!p0) r29 = memw(r3+#0)
39 if (!p0) r29=memw(r3)
41 #CHECK: 419bd01e { if (p2) r30 = memw(r27+#0)
42 if (p2) r30=memw(r27)
59 #CHECK: 919bc004 { r4 = memw(r27+#0)
60 r4=memw(r27)
92 #CHECK: 385ee06d { if (p3) memw(r30+#0) = #-19
93 if (p3) memw(r30)=#-19
[all …]
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| D | extender.s | 36 memw(##1024056) = r0
40 # CHECK: memw(##1024056) = r0
44 memw(GP + #56) = r0
47 # CHECK: memw(gp+#56) = r0
90 memw(##1024056) = r0.new
95 # CHECK: memw(##1024056) = r0.new
100 memw(GP + #56) = r0.new
104 # CHECK: memw(gp+#56) = r0.new
183 r0 = memw(##1024056)
187 # CHECK: r0 = memw(##1024056)
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| D | two-extenders.s | 42 r6 = memw(gp+#0x1000)
43 # CHECK: { r6 = memw(gp+#4096) }
56 {R27 = #1; memw(gp+#0x1000) = R27.new}
58 # CHECK-NEXT: memw(gp+#4096) = r27.new }
72 memw(gp+#0x1000) = R5
73 # CHECK: { memw(gp+#4096) = r5 }
98 r15 = memw(##0x1000)
100 # CHECK-NEXT: r15 = memw(##4096) }
112 {R24 = #1; memw(##0x1000) = R24.new}
115 # CHECK-NEXT: memw(##4096) = r24.new }
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| D | store-GPRel.s | 5 #CHECK: 4ab3f229 memw(gp+#105636) = r12.new
7 memw(gp+#105636) = r12.new }
9 #CHECK: 4ab3f229 memw(gp+#105636) = r12.new
11 memw(#105636) = r12.new }
33 #CHECK: 4c9dfa1e { memw(gp+#191608) = r26
34 { memw(gp+#191608) = r26 }
35 #CHECK: 4c9dfa1e { memw(gp+#191608) = r26
36 { memw(#191608) = r26 }
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| D | relocations.s | 49 { r0 = memw (gp+#undefined) }
158 { r0 = memw(r0 + ##undefined@gotrel) }
170 { r0 = memw(r0 + ##undefined@got) }
182 { r0 = memw(r0 + ##undefined@dtprel) }
194 { r0 = memw(r0 + ##undefined@gdgot) }
214 { r0 = memw(r0 + ##undefined@iegot) }
226 { r0 = memw(r0 + ##undefined@tprel) }
247 { r0 = memw(r0 + ##undefined@ldgot) }
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| D | load-GPRel.s | 15 #CHECK: 4d81f772 { r18 = memw(gp+#134892) }
16 r18 = memw(gp+#134892)
17 #CHECK: 4d81f772 { r18 = memw(gp+#134892) }
18 r18 = memw(#134892)
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| /external/llvm/test/MC/Hexagon/ |
| D | asmMap.s | 5 #CHECK: 3c56c000 { memw(r22{{ *}}+{{ *}}#0)=#0
6 memw(r22)=#0
38 #CHECK: 4583c01d { if (!p0) r29 = memw(r3{{ *}}+{{ *}}#0)
39 if (!p0) r29=memw(r3)
41 #CHECK: 419bd01e { if (p2) r30 = memw(r27{{ *}}+{{ *}}#0)
42 if (p2) r30=memw(r27)
59 #CHECK: 919bc004 { r4 = memw(r27{{ *}}+{{ *}}#0)
60 r4=memw(r27)
92 #CHECK: 385ee06d { if (p3) memw(r30{{ *}}+{{ *}}#0)=#-19
93 if (p3) memw(r30)=#-19
[all …]
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| D | relocations.s | 41 { r0 = memw (#undefined@gotrel) }
154 { r0 = memw(r0 + ##undefined@gotrel) }
166 { r0 = memw(r0 + ##undefined@got) }
178 { r0 = memw(r0 + ##undefined@dtprel) }
190 { r0 = memw(r0 + ##undefined@gdgot) }
210 { r0 = memw(r0 + ##undefined@iegot) }
222 { r0 = memw(r0 + ##undefined@tprel) }
243 { r0 = memw(r0 + ##undefined@ldgot) }
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| /external/llvm/test/CodeGen/Hexagon/ |
| D | section_7275.ll | 6 ; cannot use GPREL addressing, i.e. memw(#variablename).
10 ; CHECK-DAG: memw(##b)
11 ; CHECK-DAG: memw(#d)
12 ; CHECK-DAG: memw(##g)
13 ; CHECK-DAG: memw(#h)
14 ; CHECK-DAG: memw(#f)
15 ; CHECK-DAG: memw(##e)
16 ; CHECK-DAG: memw(#a)
17 ; CHECK-DAG: memw(#c)
19 ; CHECK: memw(##b)
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/ |
| D | section_7275.ll | 6 ; cannot use GPREL addressing, i.e. memw(#variablename).
10 ; CHECK-DAG: memw(##b)
11 ; CHECK-DAG: memw(gp+#d)
12 ; CHECK-DAG: memw(##g)
13 ; CHECK-DAG: memw(gp+#h)
14 ; CHECK-DAG: memw(gp+#f)
15 ; CHECK-DAG: memw(##e)
16 ; CHECK-DAG: memw(gp+#a)
17 ; CHECK-DAG: memw(gp+#c)
19 ; CHECK: memw(##b)
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| D | float-amode.ll | 15 ; CHECK: [[REG11:(r[0-9]+)]] = memw(r{{[0-9]+}}+r{{[0-9]+}}<<#2)
17 ; CHECK: memw(r{{[0-9]+}}+r{{[0-9]+}}<<#2) = [[REG12]].new
38 ; CHECK: [[REG21:(r[0-9]+)]] = memw(##globB+92)
40 ; CHECK: memw(##globA+84) = [[REG22]]
57 ; CHECK: [[REG31:(r[0-9]+)]] = memw(gp+#b)
59 ; CHECK: memw(gp+#a) = [[REG32]]
76 ; CHECK: [[REG41:(r[0-9]+)]] = memw(r0<<#2+##globB+52)
78 ; CHECK: memw(r0<<#2+##globA+60) = [[REG42]]
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| D | constext-replace.ll | 6 ; CHECK: r{{[0-9]+}} = memw(r{{[0-9]+}}+r{{[0-9]+}}<<#2)
7 ; CHECK: r{{[0-9]+}} = memw(r{{[0-9]+}}+r{{[0-9]+}}<<#2)
8 ; CHECK: r{{[0-9]+}} = memw(r{{[0-9]+}}+r{{[0-9]+}}<<#2)
9 ; CHECK-NOT: r{{[0-9]+}} = memw(r{{[0-9]+}}<<#2+##g1)
10 ; CHECK-NOT: r{{[0-9]+}} = memw(r{{[0-9]+}}<<#2+##g1)
11 ; CHECK-NOT: r{{[0-9]+}} = memw(r{{[0-9]+}}<<#2+##g1)
12 ; CHECK: memw(r{{[0-9]+}}+r{{[0-9]+}}<<#2) = r{{[0-9]+}}
13 ; CHECK: memw(r{{[0-9]+}}+r{{[0-9]+}}<<#2) = r{{[0-9]+}}
14 ; CHECK: memw(r{{[0-9]+}}+r{{[0-9]+}}<<#2) = r{{[0-9]+}}
15 ; CHECK-NOT: memw(r{{[0-9]+}}<<#2+##g1) = r{{[0-9]+}}
[all …]
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| D | no-packets.ll | 10 ; r3 = memw(r1++#4)
11 ; r4 = memw(r2++#4)
13 ; memw(r0++#4) = r3
28 ; CHECK-NEXT: memw
31 ; CHECK-NEXT: memw
37 ; CHECK-NEXT: memw
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| D | undo-dag-shift.ll | 18 ; r0 = memw(r1+r0<<#0)
21 ; r0 = memw(r1+r0<<#2)
27 ; CHECK: memw(r{{[0-9]+}}+r{{[0-9]}}<<#2)
38 ; CHECK: memw(r{{[0-9]+}}+r{{[0-9]}}<<#0)
48 ; CHECK: memw(r{{[0-9]+}}+r{{[0-9]}}<<#2)
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| D | swp-order.ll | 9 ; CHECK: = memw
10 ; CHECK: = memw
11 ; CHECK: memw({{.*}}) =
12 ; CHECK: = memw
13 ; CHECK: = memw
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| /external/llvm/test/MC/Disassembler/Hexagon/ |
| D | memop.txt | 42 # CHECK: memw(r17+#204) += r21
44 # CHECK: memw(r17+#204) -= r21
46 # CHECK: memw(r17+#204) &= r21
48 # CHECK: memw(r17+#204) |= r21
50 # CHECK: memw(r17+#204) += #21
52 # CHECK: memw(r17+#204) -= #21
54 # CHECK: memw(r17+#204) = clrbit(#21)
56 # CHECK: memw(r17+#204) = setbit(#21)
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| D | st.txt | 282 # CHECK: memw(r17 + r21<<#3) = r31
284 # CHECK: memw(r17{{ *}}+{{ *}}#84)=#31
286 # CHECK: memw(#84) = r31
288 # CHECK: memw(##84) = r21
290 # CHECK: memw(r17+#84)=#31
292 # CHECK: memw(r17+#84) = r31
294 # CHECK: memw(r17 ++ I:circ(m1)) = r21
296 # CHECK: memw(r17 ++ #20:circ(m1)) = r21
298 # CHECK: memw(r17++#20) = r21
300 # CHECK: memw(r17<<#3 + ##21) = r31
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| D | nv_st.txt | 147 # CHECK-NEXT: memw(r17 + r21<<#3) = r31.new
150 # CHECK-NEXT: memw(#84) = r31.new
153 # CHECK-NEXT: memw(r17+#84) = r31.new
156 # CHECK-NEXT: memw(r17 ++ I:circ(m1)) = r31.new
159 # CHECK-NEXT: memw(r17 ++ #20:circ(m1)) = r31.new
162 # CHECK-NEXT: memw(r17++#20) = r31.new
165 # CHECK-NEXT: memw(r17++m1) = r31.new
168 # CHECK-NEXT: memw(r17 ++ m1:brev) = r31.new
173 # CHECK-NEXT: if (p3) memw(r17+r21<<#3) = r31.new
176 # CHECK-NEXT: if (!p3) memw(r17+r21<<#3) = r31.new
[all …]
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| D | ld.txt | 292 # CHECK: r17 = memw(r21 + r31<<#3)
294 # CHECK: r17 = memw(#84)
296 # CHECK: r17 = memw(##84)
298 # CHECK: r17 = memw(r21 + #84)
300 # CHECK: r17 = memw(r21 ++ #20:circ(m1))
302 # CHECK: r17 = memw(r21 ++ I:circ(m1))
304 # CHECK: r17 = memw(r21 = ##31)
306 # CHECK: r17 = memw(r21++#20)
308 # CHECK: r17 = memw(r21++m1)
310 # CHECK: r17 = memw(r21 ++ m1:brev)
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Hexagon/ |
| D | memop.txt | 42 # CHECK: memw(r17+#204) += r21
44 # CHECK: memw(r17+#204) -= r21
46 # CHECK: memw(r17+#204) &= r21
48 # CHECK: memw(r17+#204) |= r21
50 # CHECK: memw(r17+#204) += #21
52 # CHECK: memw(r17+#204) -= #21
54 # CHECK: memw(r17+#204) = clrbit(#21)
56 # CHECK: memw(r17+#204) = setbit(#21)
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| D | st.txt | 282 # CHECK: memw(r17+r21<<#3) = r31
284 # CHECK: memw(r17+#84) = #31
286 # CHECK: memw(gp+#84) = r31
288 # CHECK: memw(##84) = r21
290 # CHECK: memw(r17+#84) = #31
292 # CHECK: memw(r17+#84) = r31
294 # CHECK: memw(r17++I:circ(m1)) = r21
296 # CHECK: memw(r17++#20:circ(m1)) = r21
298 # CHECK: memw(r17++#20) = r21
300 # CHECK: memw(r17<<#3+##21) = r31
[all …]
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| D | nv_st.txt | 147 # CHECK-NEXT: memw(r17+r21<<#3) = r31.new
150 # CHECK-NEXT: memw(gp+#84) = r31.new
153 # CHECK-NEXT: memw(r17+#84) = r31.new
156 # CHECK-NEXT: memw(r17++I:circ(m1)) = r31.new
159 # CHECK-NEXT: memw(r17++#20:circ(m1)) = r31.new
162 # CHECK-NEXT: memw(r17++#20) = r31.new
165 # CHECK-NEXT: memw(r17++m1) = r31.new
168 # CHECK-NEXT: memw(r17++m1:brev) = r31.new
173 # CHECK-NEXT: if (p3) memw(r17+r21<<#3) = r31.new
176 # CHECK-NEXT: if (!p3) memw(r17+r21<<#3) = r31.new
[all …]
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| D | ld.txt | 292 # CHECK: r17 = memw(r21+r31<<#3)
294 # CHECK: r17 = memw(gp+#84)
296 # CHECK: r17 = memw(##84)
298 # CHECK: r17 = memw(r21+#84)
300 # CHECK: r17 = memw(r21++#20:circ(m1))
302 # CHECK: r17 = memw(r21++I:circ(m1))
304 # CHECK: r17 = memw(r21=##31)
306 # CHECK: r17 = memw(r21++#20)
308 # CHECK: r17 = memw(r21++m1)
310 # CHECK: r17 = memw(r21++m1:brev)
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrAlias.td | 17 def : InstAlias<"memw({GP}+#$addr) = $Nt.new",
25 def : InstAlias<"memw({GP}+#$addr) = $Nt",
38 def : InstAlias<"$Nt = memw({GP}+#$addr)",
53 def : InstAlias<"memw($Rs) = $Rt",
62 def : InstAlias<"memw($Rs) = $Rt.new",
71 def : InstAlias<"memw($Rs) = #$S8",
83 def : InstAlias<"memw($Rs) = setbit(#$U5)",
92 def : InstAlias<"memw($Rs) = clrbit(#$U5)",
108 def : InstAlias<"$Rd = memw($Rs)",
146 def : InstAlias<"if ($Pt) $Rd = memw($Rs)",
[all …]
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