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Searched refs:mfhc1 (Results 1 – 25 of 100) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/llvm-ir/
Dbitcast.ll22 define i64 @mfhc1(double %a) {
23 ; MIPS32R2: mfhc1 {{.*}} # <MCInst #{{[0-9]+}} MFHC1_D32
24 ; MIPS32FP64: mfhc1 {{.*}} # <MCInst #{{[0-9]+}} MFHC1_D64
25 ; MM: mfhc1 {{.*}} # <MCInst #{{[0-9]+}} MFHC1_D32_MM
26 ; MMFP64: mfhc1 {{.*}} # <MCInst #{{[0-9]+}} MFHC1_D64_MM
27 ; MMR6: mfhc1 {{.*}} # <MCInst #{{[0-9]+}} MFHC1_D64_MM
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Dmno-ldc1-sdc1.ll157 ; 32R2-LE-PIC-DAG: mfhc1 $[[R1:[0-9]+]], $f12
162 ; 32R6-LE-PIC-DAG: mfhc1 $[[R1:[0-9]+]], $f12
174 ; 32R2-LE-STATIC-DAG: mfhc1 $[[R1:[0-9]+]], $f12
181 ; 32R6-LE-STATIC-DAG: mfhc1 $[[R1:[0-9]+]], $f12
193 ; 32R2-BE-PIC-DAG: mfhc1 $[[R1:[0-9]+]], $f12
198 ; 32R6-BE-PIC-DAG: mfhc1 $[[R1:[0-9]+]], $f12
218 ; MM-MNO-BE-PIC-DAG: mfhc1 $[[R3:[0-9]+]], $f12
221 ; MM-MNO-LE-PIC-DAG: mfhc1 $[[R5:[0-9]+]], $f12
296 ; 32R2-DAG: mfhc1 $[[R1:[0-9]+]], $f12
301 ; 32R6-DAG: mfhc1 $[[R1:[0-9]+]], $f12
[all …]
Do32_cc.ll147 ; HAS-MFHC1-DAG: mfhc1 $7, $f{{[0-9]+}}
164 ; HAS-MFHC1-DAG: mfhc1 $7, $f{{[0-9]+}}
224 ; HAS-MFHC1-DAG: mfhc1 $7, $f{{[0-9]+}}
286 ; HAS-MFHC1-DAG: mfhc1 $7, $f{{[0-9]+}}
316 ; HAS-MFHC1-DAG: mfhc1 $7, $f{{[0-9]+}}
Dbuildpairextractelementf64.ll31 ; HAS-MFHC1-DAG: mfhc1
Dfp64a.ll148 ; 32R2-NO-FP64A-LE-DAG: mfhc1 $7, $f0
151 ; 32R2-NO-FP64A-BE-DAG: mfhc1 $6, $f0
Dfpxx.ll203 ; 32R2-NOFPXX-DAG: mfhc1 $7, $f0
206 ; 32R2-FPXX-DAG: mfhc1 $7, $f0
/external/llvm/test/CodeGen/Mips/
Dmno-ldc1-sdc1.ll157 ; 32R2-LE-PIC-DAG: mfhc1 $[[R1:[0-9]+]], $f12
162 ; 32R6-LE-PIC-DAG: mfhc1 $[[R1:[0-9]+]], $f12
174 ; 32R2-LE-STATIC-DAG: mfhc1 $[[R1:[0-9]+]], $f12
181 ; 32R6-LE-STATIC-DAG: mfhc1 $[[R1:[0-9]+]], $f12
193 ; 32R2-BE-PIC-DAG: mfhc1 $[[R1:[0-9]+]], $f12
198 ; 32R6-BE-PIC-DAG: mfhc1 $[[R1:[0-9]+]], $f12
218 ; MM-MNO-BE-PIC: mfhc1 $[[R3:[0-9]+]], $f12
221 ; MM-MNO-LE-PIC: mfhc1 $[[R5:[0-9]+]], $f12
296 ; 32R2-DAG: mfhc1 $[[R1:[0-9]+]], $f12
301 ; 32R6-DAG: mfhc1 $[[R1:[0-9]+]], $f12
[all …]
Do32_cc.ll147 ; HAS-MFHC1-DAG: mfhc1 $7, $f{{[0-9]+}}
164 ; HAS-MFHC1-DAG: mfhc1 $7, $f{{[0-9]+}}
224 ; HAS-MFHC1-DAG: mfhc1 $7, $f{{[0-9]+}}
286 ; HAS-MFHC1-DAG: mfhc1 $7, $f{{[0-9]+}}
316 ; HAS-MFHC1-DAG: mfhc1 $7, $f{{[0-9]+}}
Dbuildpairextractelementf64.ll31 ; HAS-MFHC1-DAG: mfhc1
Dfp64a.ll148 ; 32R2-NO-FP64A-LE-DAG: mfhc1 $7, $f0
151 ; 32R2-NO-FP64A-BE-DAG: mfhc1 $6, $f0
Dfpxx.ll203 ; 32R2-NOFPXX-DAG: mfhc1 $7, $f0
206 ; 32R2-FPXX-DAG: mfhc1 $7, $f0
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid-fp64.txt9 0x54 0x80 0x30 0x3b # CHECK: mfhc1 $4, $f0
27 0x54 0x86 0x30 0x3b # CHECK: mfhc1 $4, $f6
Dvalid-fp64-el.txt9 0x80 0x54 0x3b 0x30 # CHECK: mfhc1 $4, $f0
27 0x86 0x54 0x3b 0x30 # CHECK: mfhc1 $4, $f6
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r3/
Dvalid-fp64.s20 mfhc1 $4, $f0 # CHECK: mfhc1 $4, $f0 # encoding: [0x44,0x64,0x00,0x00] label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r5/
Dvalid-fp64.s20 mfhc1 $4, $f0 # CHECK: mfhc1 $4, $f0 # encoding: [0x44,0x64,0x00,0x00] label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r2/
Dvalid-fp64.s20 mfhc1 $4, $f0 # CHECK: mfhc1 $4, $f0 # encoding: [0x44,0x64,0x00,0x00] label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips/
Dvalid-fp64.s24 mfhc1 $4, $f0 # CHECK: mfhc1 $4, $f0 # encoding: [0x54,0x80,0x30,0x3b] label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r2/
Dvalid-fp64.txt19 0x44 0x64 0x00 0x00 # CHECK: mfhc1 $4, $f0
Dvalid-fp64-el.txt19 0x00 0x00 0x64 0x44 # CHECK: mfhc1 $4, $f0
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r5/
Dvalid-fp64-el.txt19 0x00 0x00 0x64 0x44 # CHECK: mfhc1 $4, $f0
Dvalid-fp64.txt19 0x44 0x64 0x00 0x00 # CHECK: mfhc1 $4, $f0
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r3/
Dvalid-fp64.txt19 0x44 0x64 0x00 0x00 # CHECK: mfhc1 $4, $f0
Dvalid-fp64-el.txt19 0x00 0x00 0x64 0x44 # CHECK: mfhc1 $4, $f0
/external/llvm/test/MC/Mips/
Dmicromips-fpu-instructions.s56 # CHECK-EL: mfhc1 $6, $f8 # encoding: [0xc8,0x54,0x3b,0x30]
121 # CHECK-EB: mfhc1 $6, $f8 # encoding: [0x54,0xc8,0x30,0x3b]
182 mfhc1 $6, $f8
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Dmips-fpu-instructions.s174 # CHECK: mfhc1 $17, $f4 # encoding: [0x00,0x20,0x71,0x44]
209 mfhc1 $17, $f4

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