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Searched refs:mrrc2 (Results 1 – 25 of 44) sorted by relevance

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/external/llvm/test/CodeGen/ARM/
Dintrinsics-coprocessor.ll40 ; CHECK: mrrc2 p1, #2, r{{[0-9]+}}, r{{[0-9]+}}, c3
41 %3 = tail call { i32, i32 } @llvm.arm.mrrc2(i32 1, i32 2, i32 3) nounwind
79 declare { i32, i32 } @llvm.arm.mrrc2(i32, i32, i32) nounwind
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dintrinsics-coprocessor.ll39 ; CHECK: mrrc2 p1, #2, r{{[0-9]+}}, r{{[0-9]+}}, c3
40 %3 = tail call { i32, i32 } @llvm.arm.mrrc2(i32 1, i32 2, i32 3) nounwind
78 declare { i32, i32 } @llvm.arm.mrrc2(i32, i32, i32) nounwind
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dinvalid-armv8.txt104 # CHECK-V7: mrrc2
109 # CHECK-V7: mrrc2
114 # CHECK-V7: mrrc2
Dinvalid-thumbv8.txt104 # CHECK-V7: mrrc2
109 # CHECK-V7: mrrc2
114 # CHECK-V7: mrrc2
Dinvalid-armv7.txt228 # Undefined encodings for mrrc2
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/
Dintrinsics-coprocessor.ll38 ; CHECK: mrrc2 p1, #2, r{{[0-9]+}}, r{{[0-9]+}}, c3
39 %3 = tail call { i32, i32 } @llvm.arm.mrrc2(i32 1, i32 2, i32 3) nounwind
93 declare { i32, i32 } @llvm.arm.mrrc2(i32, i32, i32) nounwind
/external/llvm/test/MC/Disassembler/ARM/
Dinvalid-armv8.txt104 # CHECK-V7: mrrc2
109 # CHECK-V7: mrrc2
114 # CHECK-V7: mrrc2
Dinvalid-thumbv8.txt104 # CHECK-V7: mrrc2
109 # CHECK-V7: mrrc2
114 # CHECK-V7: mrrc2
Dinvalid-armv7.txt228 # Undefined encodings for mrrc2
/external/clang/test/CodeGen/
Dbuiltins-arm.c203 uint64_t mrrc2() { in mrrc2() function
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dthumb2-diagnostics.s38 mrrc2 p7, #17, r5, r4, c1
Ddiagnostics.s113 mrrc2 p7, #17, r5, r4, c1
Dbasic-arm-instructions.s889 mrrc2 p7, #1, r5, r4, c1
892 @ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xfc]
Dbasic-thumb2-instructions.s1155 mrrc2 p7, #1, r5, r4, c1
1158 @ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x54,0xfc,0x11,0x57]
/external/llvm/test/MC/ARM/
Dthumb2-diagnostics.s41 mrrc2 p7, #17, r5, r4, c1
Ddiagnostics.s181 mrrc2 p7, #17, r5, r4, c1
Dbasic-arm-instructions.s1399 mrrc2 p7, #1, r5, r4, c1
1402 @ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xfc]
Dbasic-thumb2-instructions.s1538 mrrc2 p7, #1, r5, r4, c1
1541 @ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x54,0xfc,0x11,0x57]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dthumb2-diagnostics.s41 mrrc2 p7, #17, r5, r4, c1
Ddiagnostics.s207 mrrc2 p7, #17, r5, r4, c1
Dbasic-thumb2-instructions.s1586 mrrc2 p7, #1, r5, r4, c1
1589 @ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x54,0xfc,0x11,0x57]
Dbasic-arm-instructions.s1401 mrrc2 p7, #1, r5, r4, c1
1404 @ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xfc]
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs383 0x11,0x57,0x54,0xfc = mrrc2 p7, #1, r5, r4, c1
Dbasic-thumb2-instructions.s.cs487 0x54,0xfc,0x11,0x57 = mrrc2 p7, #1, r5, r4, c1
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt727 # CHECK: mrrc2 p7, #1, r5, r4, c1

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