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Searched refs:mtspr (Results 1 – 25 of 71) sorted by relevance

123

/external/u-boot/arch/powerpc/cpu/mpc86xx/
Drelease.S33 mtspr PIR, r0
37 mtspr IBAT0U, r0
38 mtspr IBAT1U, r0
39 mtspr IBAT2U, r0
40 mtspr IBAT3U, r0
41 mtspr IBAT4U, r0
42 mtspr IBAT5U, r0
43 mtspr IBAT6U, r0
44 mtspr IBAT7U, r0
46 mtspr DBAT0U, r0
[all …]
Dstart.S145 mtspr HID0, r0
161 mtspr l2cr, r3
201 mtspr SPRN_SRR0,r3
202 mtspr SPRN_SRR1,r5
286 mtspr IBAT0U, r0
287 mtspr IBAT1U, r0
288 mtspr IBAT2U, r0
289 mtspr IBAT3U, r0
290 mtspr IBAT4U, r0
291 mtspr IBAT5U, r0
[all …]
Dcache.S38 mtspr HID0,r3
48 mtspr HID0,r3
180 mtspr HID0, r5
181 mtspr HID0, r3
197 mtspr HID0, r3
214 mtspr HID0, r3 /* no invalidate, unlock */
217 mtspr HID0, r5 /* enable + invalidate */
218 mtspr HID0, r3 /* enable */
230 mtspr HID0, r3 /* no invalidate, unlock */
233 mtspr HID0, r5 /* enable + invalidate */
[all …]
/external/u-boot/arch/powerpc/lib/
Dbat_rw.c27 mtspr (DBAT0L, lower); in write_bat()
28 mtspr (DBAT0U, upper); in write_bat()
32 mtspr (IBAT0L, lower); in write_bat()
33 mtspr (IBAT0U, upper); in write_bat()
36 mtspr (DBAT1L, lower); in write_bat()
37 mtspr (DBAT1U, upper); in write_bat()
41 mtspr (IBAT1L, lower); in write_bat()
42 mtspr (IBAT1U, upper); in write_bat()
45 mtspr (DBAT2L, lower); in write_bat()
46 mtspr (DBAT2U, upper); in write_bat()
[all …]
/external/capstone/suite/MC/PowerPC/
Dppc64-encoding-bookIII.s.cs11 0x7c,0x90,0x43,0xa6 = mtspr 272, 4
12 0x7c,0x91,0x43,0xa6 = mtspr 273, 4
13 0x7c,0x92,0x43,0xa6 = mtspr 274, 4
14 0x7c,0x93,0x43,0xa6 = mtspr 275, 4
15 0x7c,0x90,0x43,0xa6 = mtspr 272, 4
16 0x7c,0x91,0x43,0xa6 = mtspr 273, 4
17 0x7c,0x92,0x43,0xa6 = mtspr 274, 4
18 0x7c,0x93,0x43,0xa6 = mtspr 275, 4
19 0x7c,0x98,0x43,0xa6 = mtspr 280, 4
21 0x7c,0x96,0x03,0xa6 = mtspr 22, 4
[all …]
/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dstart.S113 mtspr SPRN_HDBCR0,r3
122 mtspr SPRN_HDBCR0, r3
147 mtspr SPRN_L2CSR0,r3
160 mtspr SPRN_L2CSR0,r4
170 mtspr L1CSR0,r0 /* invalidate d-cache */
171 mtspr L1CSR1,r0 /* invalidate i-cache */
174 mtspr DBSR,r1 /* Clear all valid bits */
180 mtspr MAS0, \scratch
183 mtspr MAS1, \scratch
186 mtspr MAS2, \scratch
[all …]
Drelease.S34 mtspr SPRN_HDBCR0, r3
44 mtspr SPRN_HID0,r3
55 mtspr SPRN_HID1,r3
61 mtspr SPRN_HDBCR1,r3
86 mtspr SPRN_HDBCR0,r3
94 mtspr SPRN_BUCSR,r3
104 mtspr SPRN_L1CSR1,r2
112 mtspr SPRN_L1CSR1,r3
122 mtspr SPRN_L1CSR0,r2
130 mtspr SPRN_L1CSR0,r3
[all …]
Dcpu_init_early.c34 mtspr(MAS0, _mas0); in setup_ifc()
35 mtspr(MAS1, _mas1); in setup_ifc()
36 mtspr(MAS2, _mas2); in setup_ifc()
37 mtspr(MAS3, _mas3); in setup_ifc()
38 mtspr(MAS7, _mas7); in setup_ifc()
62 mtspr(MAS0, _mas0); in setup_ifc()
63 mtspr(MAS1, _mas1); in setup_ifc()
64 mtspr(MAS2, _mas2); in setup_ifc()
65 mtspr(MAS3, _mas3); in setup_ifc()
66 mtspr(MAS7, _mas7); in setup_ifc()
Dtlb.c23 mtspr(MMUCSR0, 0x4); in invalidate_tlb()
25 mtspr(MMUCSR0, 0x2); in invalidate_tlb()
50 mtspr(MAS0, FSL_BOOKE_MAS0(1, idx, 0)); in read_tlbcam_entry()
109 mtspr(MAS0, FSL_BOOKE_MAS0(1, i, 0)); in init_used_tlb_cams()
177 mtspr(MAS0, _mas0); in disable_tlb()
178 mtspr(MAS1, _mas1); in disable_tlb()
179 mtspr(MAS2, _mas2); in disable_tlb()
180 mtspr(MAS3, _mas3); in disable_tlb()
182 mtspr(MAS7, 0); in disable_tlb()
203 mtspr(MAS6, 0); in find_tlb_idx()
/external/llvm/test/MC/PowerPC/
Dppc64-encoding-bookIII.s53 # NOT-CHECK-BE: mtspr 260, 4 # encoding: [0x7c,0x90,0x43,0xa6]
54 # NOT-CHECK-LE: mtspr 260, 4 # encoding: [0xa6,0x43,0x90,0x7c]
57 # NOT-CHECK-BE: mtspr 261, 4 # encoding: [0x7c,0x91,0x43,0xa6]
58 # NOT-CHECK-LE: mtspr 261, 4 # encoding: [0xa6,0x43,0x91,0x7c]
61 # NOT-CHECK-BE: mtspr 262, 4 # encoding: [0x7c,0x92,0x43,0xa6]
62 # NOT-CHECK-LE: mtspr 262, 4 # encoding: [0xa6,0x43,0x92,0x7c]
65 # NOT-CHECK-BE: mtspr 263, 4 # encoding: [0x7c,0x93,0x43,0xa6]
66 # NOT-CHECK-LE: mtspr 263, 4 # encoding: [0xa6,0x43,0x93,0x7c]
69 # CHECK-BE: mtspr 260, 4 # encoding: [0x7c,0x84,0x43,0xa6]
70 # CHECK-LE: mtspr 260, 4 # encoding: [0xa6,0x43,0x84,0x7c]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dppc64-encoding-bookIII.s61 # NOT-CHECK-BE: mtspr 260, 4 # encoding: [0x7c,0x90,0x43,0xa6]
62 # NOT-CHECK-LE: mtspr 260, 4 # encoding: [0xa6,0x43,0x90,0x7c]
65 # NOT-CHECK-BE: mtspr 261, 4 # encoding: [0x7c,0x91,0x43,0xa6]
66 # NOT-CHECK-LE: mtspr 261, 4 # encoding: [0xa6,0x43,0x91,0x7c]
69 # NOT-CHECK-BE: mtspr 262, 4 # encoding: [0x7c,0x92,0x43,0xa6]
70 # NOT-CHECK-LE: mtspr 262, 4 # encoding: [0xa6,0x43,0x92,0x7c]
73 # NOT-CHECK-BE: mtspr 263, 4 # encoding: [0x7c,0x93,0x43,0xa6]
74 # NOT-CHECK-LE: mtspr 263, 4 # encoding: [0xa6,0x43,0x93,0x7c]
77 # CHECK-BE: mtspr 260, 4 # encoding: [0x7c,0x84,0x43,0xa6]
78 # CHECK-LE: mtspr 260, 4 # encoding: [0xa6,0x43,0x84,0x7c]
[all …]
/external/u-boot/arch/powerpc/cpu/mpc8xx/
Dcache.c21 mtspr(IC_CST, IDC_INVALL); in icache_enable()
22 mtspr(IC_CST, IDC_ENABLE); in icache_enable()
28 mtspr(IC_CST, IDC_DISABLE); in icache_disable()
38 mtspr(MD_CTR, MD_RESETVAL); /* Set cache mode with MMU off */ in dcache_enable()
39 mtspr(DC_CST, IDC_INVALL); in dcache_enable()
40 mtspr(DC_CST, IDC_ENABLE); in dcache_enable()
46 mtspr(DC_CST, IDC_DISABLE); in dcache_disable()
47 mtspr(DC_CST, IDC_INVALL); in dcache_disable()
Dstart.S73 mtspr 638, r3
79 mtspr SRR1, r3 /* Make SRR1 match MSR */
86 mtspr LCTRL1, r0 /* Initialize debug port regs */
87 mtspr LCTRL2, r0
88 mtspr COUNTA, r0
89 mtspr COUNTB, r0
98 mtspr IC_CST, r3
99 mtspr DC_CST, r3
102 mtspr IC_CST, r3
103 mtspr DC_CST, r3
[all …]
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-bookIII.txt30 # CHECK: mtspr 272, 4
33 # CHECK: mtspr 273, 4
36 # CHECK: mtspr 274, 4
39 # CHECK: mtspr 275, 4
42 # CHECK: mtspr 272, 4
45 # CHECK: mtspr 273, 4
48 # CHECK: mtspr 274, 4
51 # CHECK: mtspr 275, 4
54 # CHECK: mtspr 280, 4
60 # CHECK: mtspr 22, 4
[all …]
/external/u-boot/arch/powerpc/cpu/mpc83xx/
Dstart.S114 mtspr SRR0, r4
115 mtspr SRR1, r3
443 mtspr SRR0,r24
444 mtspr SRR1,r20
463 mtspr XER,r2
471 mtspr SRR0,r2
472 mtspr SRR1,r0
498 mtspr SRR1, r3 /* Make SRR1 match MSR */
547 mtspr HID0, r3
552 mtspr HID0, r3
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-bookIII.txt36 # CHECK: mtspr 272, 4
39 # CHECK: mtspr 273, 4
42 # CHECK: mtspr 274, 4
45 # CHECK: mtspr 275, 4
48 # CHECK: mtspr 272, 4
51 # CHECK: mtspr 273, 4
54 # CHECK: mtspr 274, 4
57 # CHECK: mtspr 275, 4
60 # CHECK: mtspr 280, 4
66 # CHECK: mtspr 22, 4
[all …]
/external/linux-kselftest/tools/testing/selftests/powerpc/pmu/ebb/
Debb.c40 mtspr(SPRN_MMCR0, (val & ~mmcr0_clear_mask) | MMCR0_PMAE); in reset_ebb_with_clear_mask()
43 mtspr(SPRN_BESCRR, BESCR_PMEO); in reset_ebb_with_clear_mask()
46 mtspr(SPRN_BESCRS, BESCR_PME); in reset_ebb_with_clear_mask()
153 mtspr(SPRN_EBBHR, entry); in setup_ebb_handler()
296 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) | MMCR0_FC); in ebb_freeze_pmcs()
303 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_FC); in ebb_unfreeze_pmcs()
310 mtspr(SPRN_BESCR, 0x8000000100000000ull); in ebb_global_enable()
317 mtspr(SPRN_BESCRR, BESCR_PME); in ebb_global_disable()
381 mtspr(SPRN_PMC1, pmc_sample_period(sample_period)); in ebb_child()
439 mtspr(SPRN_PMC1, 0); in write_pmc1()
[all …]
Dmulti_counter_test.c58 mtspr(SPRN_PMC1, pmc_sample_period(sample_period)); in multi_counter()
59 mtspr(SPRN_PMC2, pmc_sample_period(sample_period)); in multi_counter()
60 mtspr(SPRN_PMC3, pmc_sample_period(sample_period)); in multi_counter()
61 mtspr(SPRN_PMC4, pmc_sample_period(sample_period)); in multi_counter()
62 mtspr(SPRN_PMC5, pmc_sample_period(sample_period)); in multi_counter()
63 mtspr(SPRN_PMC6, pmc_sample_period(sample_period)); in multi_counter()
Dpmc56_overflow_test.c69 mtspr(SPRN_PMC2, pmc_sample_period(sample_period)); in pmc56_overflow()
70 mtspr(SPRN_PMC5, 0); in pmc56_overflow()
71 mtspr(SPRN_PMC6, 0); in pmc56_overflow()
Dcycles_with_freeze_test.c74 mtspr(SPRN_PMC1, pmc_sample_period(sample_period)); in cycles_with_freeze()
84 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_FC); in cycles_with_freeze()
90 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) | MMCR0_FC); in cycles_with_freeze()
Dreg_access_test.c23 mtspr(SPRN_BESCR, expected); in reg_access()
29 mtspr(SPRN_EBBHR, expected); in reg_access()
/external/boringssl/linux-ppc64le/crypto/modes/
Dghashp8-ppc.S12 mtspr 256,0
124 mtspr 256,12
137 mtspr 256,0
173 mtspr 256,12
187 mtspr 256,0
289 mtspr 256,12
325 mtspr 256,0
533 mtspr 256,12
/external/u-boot/arch/powerpc/include/asm/
Dcache.h119 mtspr(IC_CST, val); in wr_ic_cst()
124 mtspr(IC_ADR, val); in wr_ic_adr()
134 mtspr(DC_CST, val); in wr_dc_cst()
139 mtspr(DC_ADR, val); in wr_dc_adr()
/external/boringssl/linux-ppc64le/crypto/aes/
Daesp8-ppc.S45 mtspr 256,0
275 mtspr 256,12
340 mtspr 256,0
394 mtspr 256,12
407 mtspr 256,0
461 mtspr 256,12
476 mtspr 256,0
622 mtspr 256,12
669 mtspr 256,0
1167 mtspr 256,12
[all …]
/external/linux-kselftest/tools/testing/selftests/powerpc/ptrace/
Dptrace-tar.c28 mtspr(SPRN_TAR, TAR_1); in tar()
29 mtspr(SPRN_PPR, PPR_1); in tar()
30 mtspr(SPRN_DSCR, DSCR_1); in tar()

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